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Message-Id: <ddfa1512140be756c0432084e18d5d29b1f653ff.1733726057.git.unicorn_wang@outlook.com>
Date: Mon, 9 Dec 2024 15:12:24 +0800
From: Chen Wang <unicornxw@...il.com>
To: u.kleine-koenig@...libre.com,
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Subject: [PATCH v2 3/3] riscv: sophgo: dts: add msi controller for SG2042
From: Chen Wang <unicorn_wang@...look.com>
Add msi-controller node to dts for SG2042.
Signed-off-by: Chen Wang <unicorn_wang@...look.com>
---
arch/riscv/boot/dts/sophgo/sg2042.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
index e62ac51ac55a..bda49a398daf 100644
--- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
+++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
@@ -173,6 +173,16 @@ pllclk: clock-controller@...00100c0 {
#clock-cells = <1>;
};
+ msi: msi-controller@...0010304 {
+ compatible = "sophgo,sg2042-msi";
+ reg = <0x70 0x30010304 0x0 0x4>;
+ reg-names = "clr";
+ msi-controller;
+ msi-ranges = <&intc 64 IRQ_TYPE_LEVEL_HIGH 32>;
+ sophgo,msi-doorbell-addr = <0x00000070 0x30010300>;
+ interrupt-parent = <&intc>;
+ };
+
rpgate: clock-controller@...0010368 {
compatible = "sophgo,sg2042-rpgate";
reg = <0x70 0x30010368 0x0 0x98>;
--
2.34.1
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