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Message-ID: <Z1bZvsGdwd5dlJow@dragon>
Date: Mon, 9 Dec 2024 19:51:26 +0800
From: Shawn Guo <shawnguo2@...h.net>
To: Liu Ying <victor.liu@....com>
Cc: imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-clk@...r.kernel.org, dri-devel@...ts.freedesktop.org,
	shawnguo@...nel.org, s.hauer@...gutronix.de, kernel@...gutronix.de,
	festevam@...il.com, robh@...nel.org, krzk+dt@...nel.org,
	conor+dt@...nel.org, catalin.marinas@....com, will@...nel.org,
	abelvesa@...nel.org, peng.fan@....com, mturquette@...libre.com,
	sboyd@...nel.org, andrzej.hajda@...el.com,
	neil.armstrong@...aro.org, rfoss@...nel.org,
	Laurent.pinchart@...asonboard.com, jonas@...boo.se,
	jernej.skrabec@...il.com, maarten.lankhorst@...ux.intel.com,
	mripard@...nel.org, tzimmermann@...e.de, airlied@...il.com,
	simona@...ll.ch, quic_bjorande@...cinc.com, geert+renesas@...der.be,
	dmitry.baryshkov@...aro.org, arnd@...db.de, nfraprado@...labora.com,
	marex@...x.de
Subject: Re: [PATCH v6 1/7] arm64: dts: imx8mp-skov-revb-mi1010ait-1cp1: Set
 "media_disp2_pix" clock rate to 70MHz

On Tue, Nov 12, 2024 at 06:05:41PM +0800, Liu Ying wrote:
> The LVDS panel "multi-inno,mi1010ait-1cp" used on this platform has
> a typical pixel clock rate of 70MHz.  Set "media_disp2_pix" clock rate
> to that rate, instead of the original 68.9MHz.  The LVDS serial clock
> is controlled by "media_ldb" clock.  It should run at 490MHz(7-fold the
> pixel clock rate due to single LVDS link).  Set "video_pll1" clock rate
> and "media_ldb" to 490MHz to achieve that.
> 
> This should be able to suppress this LDB driver warning:
> [   17.206644] fsl-ldb 32ec0000.blk-ctrl:bridge@5c: Configured LDB clock (70000000 Hz) does not match requested LVDS clock: 490000000 Hz
> 
> This also makes the display mode used by the panel pass mode validation
> against pixel clock rate and "media_ldb" clock rate in a certain display
> driver.
> 
> Signed-off-by: Liu Ying <victor.liu@....com>

Applied, thanks!


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