linux-kernel - Re: [net-next PATCH v5 1/6] octeontx2: Set appropriate PF, VF masks and shifts based on silicon

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Message-ID:
 <CO1PR18MB4666D202E13064800B338799A13D2@CO1PR18MB4666.namprd18.prod.outlook.com>
Date: Tue, 10 Dec 2024 13:55:50 +0000
From: Subbaraya Sundeep Bhatta <sbhatta@...vell.com>
To: Jakub Kicinski <kuba@...nel.org>
CC: Sai Krishna Gajula <saikrishnag@...vell.com>,
        "davem@...emloft.net"
	<davem@...emloft.net>,
        "edumazet@...gle.com" <edumazet@...gle.com>,
        "pabeni@...hat.com" <pabeni@...hat.com>,
        "netdev@...r.kernel.org"
	<netdev@...r.kernel.org>,
        "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>,
        Sunil Kovvuri Goutham <sgoutham@...vell.com>,
        Geethasowjanya Akula <gakula@...vell.com>,
        Linu Cherian
	<lcherian@...vell.com>, Jerin Jacob <jerinj@...vell.com>,
        Hariprasad Kelam
	<hkelam@...vell.com>,
        "andrew+netdev@...n.ch" <andrew+netdev@...n.ch>,
        "kalesh-anakkur.purayil@...adcom.com" <kalesh-anakkur.purayil@...adcom.com>
Subject: Re: [net-next PATCH v5 1/6] octeontx2: Set appropriate PF, VF masks
 and shifts based on silicon

Hi Jakub,

>From: Jakub Kicinski <mailto:kuba@...nel.org>
>Sent: Tuesday, December 10, 2024 2:55 AM
>To: Subbaraya Sundeep Bhatta <mailto:sbhatta@...vell.com>
>Cc: Sai Krishna Gajula <mailto:saikrishnag@...vell.com>;
>mailto:davem@...emloft.net; mailto:edumazet@...gle.com;
>mailto:pabeni@...hat.com; mailto:netdev@...r.kernel.org; mailto:linux-
>kernel@...r.kernel.org; Sunil Kovvuri Goutham <mailto:sgoutham@...vell.com>;
>Geethasowjanya Akula <mailto:gakula@...vell.com>; Linu Cherian
><mailto:lcherian@...vell.com>; Jerin Jacob <mailto:jerinj@...vell.com>;
>Hariprasad Kelam <mailto:hkelam@...vell.com>;
>mailto:andrew+netdev@...n.ch; mailto:kalesh-anakkur.purayil@...adcom.com
>Subject: Re: [EXTERNAL] Re: [net-next PATCH v5 1/6] octeontx2: Set appropriate
>PF, VF masks and shifts based on silicon
>> >> -#define RVU_PFVF_PF_SHIFT	10
>> >> -#define RVU_PFVF_PF_MASK	0x3F
>> >> -#define RVU_PFVF_FUNC_SHIFT	0
>> >> -#define RVU_PFVF_FUNC_MASK	0x3FF
>> >> +#define RVU_PFVF_PF_SHIFT	rvu_pcifunc_pf_shift
>> >> +#define RVU_PFVF_PF_MASK	rvu_pcifunc_pf_mask
>> >> +#define RVU_PFVF_FUNC_SHIFT	rvu_pcifunc_func_shift
>> >> +#define RVU_PFVF_FUNC_MASK	rvu_pcifunc_func_mask
>> >
>> >Why do you maintain these defines? Looks like an unnecessary
>> >indirection.
>> >
>> >Given these are simple mask and shift values they probably have trivial
>> >users. Start by adding helpers which perform the conversions using
>> >those, then you can more easily update constants.
>>
>> There are too many places these masks are used hence added this
>> indirection.
>> # grep RVU_PFVF_ drivers/* -inr | wc -l
>> 135
>
>Yes, I have checked before making the suggestion.
>Add a helper first, you can use cocci to do the conversions.

Initially I thought of doing similar kind of changes by visiting each line using these masks. But patch would be
much bigger and also to avoid any regression issues for existing silicons and crypto driver, I thought this would be safe and simple.
Please let me know if this is still not okay for you.

Thanks,
Sundeep