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Message-ID: <Z1hT7Z1sp_6Qv6Me@arm.com>
Date: Tue, 10 Dec 2024 14:45:01 +0000
From: Catalin Marinas <catalin.marinas@....com>
To: Jason Gunthorpe <jgg@...dia.com>
Cc: Will Deacon <will@...nel.org>, ankita@...dia.com, maz@...nel.org,
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Subject: Re: [PATCH v2 0/1] KVM: arm64: Map GPU memory with no struct pages
On Tue, Dec 10, 2024 at 10:18:06AM -0400, Jason Gunthorpe wrote:
> On Tue, Dec 10, 2024 at 02:07:40PM +0000, Will Deacon wrote:
> > On Mon, Nov 18, 2024 at 01:19:57PM +0000, ankita@...dia.com wrote:
> > > The changes are heavily influenced by the insightful discussions between
> > > Catalin Marinas and Jason Gunthorpe [1] on v1. Many thanks for their
> > > valuable suggestions.
> > >
> > > Link: https://lore.kernel.org/lkml/20230907181459.18145-2-ankita@nvidia.com [1]
> >
> > That's a different series, no? It got merged at v9:
>
> I was confused by this too. v1 of that series included this patch, as
> that series went along it became focused only on enabling WC
> (Normal-NC) in a VM for device MMIO and this patch for device cachable
> memory was dropped off.
>
> There are two related things:
> 1) Device MMIO memory should be able to be Normal-NC in a VM. Already
> merged
> 2) Device Cachable memory (ie CXL and pre-CXL coherently attached
> memory) should be Normal Cachable in a VM, even if it doesn't have
> struct page/etc. (this patch)
>
> IIRC this part was dropped off because of the MTE complexity that
> Catalin raised.
Indeed, we only merged the Normal NC part at the time. I asked Ankit to
drop the cacheable attributes and only focus on getting the other part
merged.
--
Catalin
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