[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Z1hzdLQLlIPg7eV5@J2N7QTR9R3>
Date: Tue, 10 Dec 2024 16:59:32 +0000
From: Mark Rutland <mark.rutland@....com>
To: Anshuman Khandual <anshuman.khandual@....com>
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Jonathan Corbet <corbet@....net>, Marc Zyngier <maz@...nel.org>,
Oliver Upton <oliver.upton@...ux.dev>,
James Morse <james.morse@....com>,
Suzuki K Poulose <suzuki.poulose@....com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>, Mark Brown <broonie@...nel.org>,
kvmarm@...ts.linux.dev
Subject: Re: [PATCH V2 0/7] arm64/hw_breakpoint: Enable FEAT_Debugv8p9
On Mon, Oct 28, 2024 at 11:04:19AM +0530, Anshuman Khandual wrote:
> This series enables FEAT_Debugv8p9 thus extending breakpoint and watchpoint
> support upto 64. This series is based on v6.12-rc5 although this depends on
> FEAT_FGT2 FGU series posted earlier, for MDSELR_EL1 handling in various KVM
> guest configurations.
>
> https://lore.kernel.org/all/20241001024356.1096072-1-anshuman.khandual@arm.com/
To avoid further confusion: since we discussed things further on the v1
thread after this v2 thread was posted, I'm waiting for a v3 to be
posted which addresses the comments there (e.g. ID reg field handling,
mutual exclusion for breakpoint manipulation).
Mark.
> Cc: Jonathan Corbet <corbet@....net>
> Cc: Marc Zyngier <maz@...nel.org>
> Cc: Oliver Upton <oliver.upton@...ux.dev>
> Cc: James Morse <james.morse@....com>
> Cc: Suzuki K Poulose <suzuki.poulose@....com>
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: Will Deacon <will@...nel.org>
> Cc: Mark Brown <broonie@...nel.org>
> Cc: Mark Rutland <mark.rutland@....com>
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: kvmarm@...ts.linux.dev
> Cc: linux-kernel@...r.kernel.org
>
> Changes in V2:
>
> Following changes have been made per review comments from Mark Rutland
>
> - Orr MDCR_EL2_EBWE directly without an intermittent register
> - Alphabetically order header files in debug-monitors.c
> - Dropped embwe_ref_count mechanism
> - Dropped preempt_enable() from AARCH64_DBG_READ
> - Dropped preempt_disable() from AARCH64_DBG_WRITE
> - Dropped set_bank_index()
> - Renamed read/write_wb_reg() as __read/__write_wb_reg()
> - Modified read/write_wb_reg() to have MDSELR_E1 based banked read/write
> - Added required sysreg tools patches from KVM FEAT_FGT2 series for build
>
> Changes in V1:
>
> https://lore.kernel.org/all/20241001043602.1116991-1-anshuman.khandual@arm.com/
>
> - Changed FTR_STRICT to FTR_NONSTRICT for the following ID_AA64DFR1_EL1
> register fields - ABL_CMPs, DPFZS, PMICNTR, CTX_CMPs, WRPs and BRPs
>
> Changes in RFC V2:
>
> https://lore.kernel.org/linux-arm-kernel/20240620092607.267132-1-anshuman.khandual@arm.com/
>
> - This series has been split from RFC V1 dealing only with arm64 breakpoints
> - Restored back DBG_MDSCR_MASK definition (unrelated change)
> - Added preempt_disable()/enable() blocks between selecting banks and registers
>
> Changes in RFC:
>
> https://lore.kernel.org/all/20240405080008.1225223-1-anshuman.khandual@arm.com/
>
> Anshuman Khandual (7):
> arm64/sysreg: Update register fields for ID_AA64MMFR0_EL1
> arm64/sysreg: Add register fields for MDSELR_EL1
> arm64/sysreg: Add register fields for HDFGRTR2_EL2
> arm64/sysreg: Add register fields for HDFGWTR2_EL2
> arm64/cpufeature: Add field details for ID_AA64DFR1_EL1 register
> arm64/boot: Enable EL2 requirements for FEAT_Debugv8p9
> arm64/hw_breakpoint: Enable FEAT_Debugv8p9
>
> Documentation/arch/arm64/booting.rst | 19 +++++++
> arch/arm64/include/asm/debug-monitors.h | 1 +
> arch/arm64/include/asm/el2_setup.h | 26 +++++++++
> arch/arm64/include/asm/hw_breakpoint.h | 46 ++++++++++++----
> arch/arm64/include/asm/kvm_arm.h | 1 +
> arch/arm64/kernel/cpufeature.c | 21 ++++++--
> arch/arm64/kernel/debug-monitors.c | 15 ++++--
> arch/arm64/kernel/hw_breakpoint.c | 38 +++++++++++++-
> arch/arm64/tools/sysreg | 70 +++++++++++++++++++++++++
> 9 files changed, 216 insertions(+), 21 deletions(-)
>
> --
> 2.25.1
>
Powered by blists - more mailing lists