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Message-ID: <202412110652.76eW7ZLA-lkp@intel.com>
Date: Wed, 11 Dec 2024 06:51:36 +0800
From: kernel test robot <lkp@...el.com>
To: Ard Biesheuvel <ardb@...nel.org>
Cc: oe-kbuild-all@...ts.linux.dev, linux-kernel@...r.kernel.org,
Catalin Marinas <catalin.marinas@....com>
Subject: arch/arm64/kernel/pi/patch-scs.c:64:29: sparse: sparse: incorrect
type in assignment (different base types)
Hi Ard,
First bad commit (maybe != root cause):
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 7cb1b466315004af98f6ba6c2546bb713ca3c237
commit: 8a6e40e1f68e9fc44497db88e0c0f21bb513c551 arm64: head: move dynamic shadow call stack patching into early C runtime
date: 10 months ago
config: arm64-randconfig-r121-20241210 (https://download.01.org/0day-ci/archive/20241211/202412110652.76eW7ZLA-lkp@intel.com/config)
compiler: clang version 20.0.0git (https://github.com/llvm/llvm-project 592c0fe55f6d9a811028b5f3507be91458ab2713)
reproduce: (https://download.01.org/0day-ci/archive/20241211/202412110652.76eW7ZLA-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202412110652.76eW7ZLA-lkp@intel.com/
sparse warnings: (new ones prefixed by >>)
arch/arm64/kernel/pi/patch-scs.c:208:5: sparse: sparse: symbol 'scs_patch' was not declared. Should it be static?
arch/arm64/kernel/pi/patch-scs.c:254:24: sparse: sparse: symbol 'scs_patch_vmlinux' was not declared. Should it be static?
>> arch/arm64/kernel/pi/patch-scs.c:64:29: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned int [usertype] @@ got restricted __le32 [usertype] @@
arch/arm64/kernel/pi/patch-scs.c:64:29: sparse: expected unsigned int [usertype]
arch/arm64/kernel/pi/patch-scs.c:64:29: sparse: got restricted __le32 [usertype]
arch/arm64/kernel/pi/patch-scs.c:67:29: sparse: sparse: incorrect type in assignment (different base types) @@ expected unsigned int [usertype] @@ got restricted __le32 [usertype] @@
arch/arm64/kernel/pi/patch-scs.c:67:29: sparse: expected unsigned int [usertype]
arch/arm64/kernel/pi/patch-scs.c:67:29: sparse: got restricted __le32 [usertype]
vim +64 arch/arm64/kernel/pi/patch-scs.c
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 57
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 58 static void __always_inline scs_patch_loc(u64 loc)
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 59 {
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 60 u32 insn = le32_to_cpup((void *)loc);
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 61
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 62 switch (insn) {
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 63 case PACIASP:
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 @64 *(u32 *)loc = cpu_to_le32(SCS_PUSH);
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 65 break;
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 66 case AUTIASP:
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 67 *(u32 *)loc = cpu_to_le32(SCS_POP);
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 68 break;
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 69 default:
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 70 /*
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 71 * While the DW_CFA_negate_ra_state directive is guaranteed to
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 72 * appear right after a PACIASP/AUTIASP instruction, it may
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 73 * also appear after a DW_CFA_restore_state directive that
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 74 * restores a state that is only partially accurate, and is
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 75 * followed by DW_CFA_negate_ra_state directive to toggle the
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 76 * PAC bit again. So we permit other instructions here, and ignore
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 77 * them.
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 78 */
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 79 return;
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 80 }
8a6e40e1f68e9fc arch/arm64/kernel/pi/patch-scs.c Ard Biesheuvel 2024-02-14 81 if (IS_ENABLED(CONFIG_ARM64_WORKAROUND_CLEAN_CACHE))
8a6e40e1f68e9fc arch/arm64/kernel/pi/patch-scs.c Ard Biesheuvel 2024-02-14 82 asm("dc civac, %0" :: "r"(loc));
8a6e40e1f68e9fc arch/arm64/kernel/pi/patch-scs.c Ard Biesheuvel 2024-02-14 83 else
8a6e40e1f68e9fc arch/arm64/kernel/pi/patch-scs.c Ard Biesheuvel 2024-02-14 84 asm(ALTERNATIVE("dc cvau, %0", "nop", ARM64_HAS_CACHE_IDC)
8a6e40e1f68e9fc arch/arm64/kernel/pi/patch-scs.c Ard Biesheuvel 2024-02-14 85 :: "r"(loc));
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 86 }
3b619e22c4601b4 arch/arm64/kernel/patch-scs.c Ard Biesheuvel 2022-10-27 87
:::::: The code at line 64 was first introduced by commit
:::::: 3b619e22c4601b444ed2d6a5458271f72625ac89 arm64: implement dynamic shadow call stack for Clang
:::::: TO: Ard Biesheuvel <ardb@...nel.org>
:::::: CC: Will Deacon <will@...nel.org>
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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