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Message-ID: <1e953fb5a4e4965ba509a1bb45e7c8336102ff29.camel@mediatek.com>
Date: Tue, 10 Dec 2024 06:47:48 +0000
From: CK Hu (胡俊光) <ck.hu@...iatek.com>
To: Jason-JH Lin (林睿祥) <Jason-JH.Lin@...iatek.com>,
"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>, "AngeloGioacchino Del
Regno" <angelogioacchino.delregno@...labora.com>
CC: Singo Chang (張興國) <Singo.Chang@...iatek.com>,
Project_Global_Chrome_Upstream_Group
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
Nancy Lin (林欣螢) <Nancy.Lin@...iatek.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Shawn Sung (宋孝謙) <Shawn.Sung@...iatek.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, "linux-mediatek@...ts.infradead.org"
<linux-mediatek@...ts.infradead.org>
Subject: Re: [PATCH v3] drm/mediatek: Move mtk_crtc_finish_page_flip() to
ddp_cmdq_cb()
Hi, Jason:
On Tue, 2024-12-10 at 11:28 +0800, Jason-JH.Lin wrote:
> mtk_crtc_finish_page_flip() is used to notify userspace that a
> page flip has been completed, allowing userspace to free the frame
> buffer of the last frame and commit the next frame.
>
> In MediaTek's hardware design for configuring display hardware by using
> GCE, `DRM_EVENT_FLIP_COMPLETE` should be notified to userspace after
> GCE has finished configuring all display hardware settings for each
> atomic_commit().
>
> Currently, mtk_crtc_finish_page_flip() cannot guarantee that GCE has
> configured all the display hardware settings of the last frame.
> Therefore, to increase the accuracy of the timing for notifying
> `DRM_EVENT_FLIP_COMPLETE` to userspace, mtk_crtc_finish_page_flip()
> should be moved to ddp_cmdq_cb().
>
> Fixes: 7f82d9c43879 ("drm/mediatek: Clear pending flag when cmdq packet is done")
> Signed-off-by: Jason-JH.Lin <jason-jh.lin@...iatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_crtc.c | 29 +++++++++++++++++++++--------
> 1 file changed, 21 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_crtc.c b/drivers/gpu/drm/mediatek/mtk_crtc.c
> index eb0e1233ad04..dabc2f8086b6 100644
> --- a/drivers/gpu/drm/mediatek/mtk_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_crtc.c
> @@ -109,9 +109,14 @@ static void mtk_crtc_finish_page_flip(struct mtk_crtc *mtk_crtc)
> static void mtk_drm_finish_page_flip(struct mtk_crtc *mtk_crtc)
> {
> unsigned long flags;
> + struct drm_crtc *crtc = &mtk_crtc->base;
> + struct mtk_drm_private *priv = crtc->dev->dev_private;
>
> drm_crtc_handle_vblank(&mtk_crtc->base);
>
> + if (!priv->data->shadow_register)
> + return;
> +
I forget one case.
For the CPU case (SoC has no shadow register and CONFIG_MTK_CMDQ is not enable),
this driver should still work.
CPU case is not a usual case, but it could be used in some verification case.
So the condition may be
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
if (mtk_crtc->cmdq_client.chan)
return;
#endif
> spin_lock_irqsave(&mtk_crtc->config_lock, flags);
> if (!mtk_crtc->config_updating && mtk_crtc->pending_needs_vblank) {
> mtk_crtc_finish_page_flip(mtk_crtc);
> @@ -284,10 +289,8 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg)
> state = to_mtk_crtc_state(mtk_crtc->base.state);
>
> spin_lock_irqsave(&mtk_crtc->config_lock, flags);
> - if (mtk_crtc->config_updating) {
> - spin_unlock_irqrestore(&mtk_crtc->config_lock, flags);
> + if (mtk_crtc->config_updating)
> goto ddp_cmdq_cb_out;
> - }
>
> state->pending_config = false;
>
> @@ -315,10 +318,15 @@ static void ddp_cmdq_cb(struct mbox_client *cl, void *mssg)
> mtk_crtc->pending_async_planes = false;
> }
>
> - spin_unlock_irqrestore(&mtk_crtc->config_lock, flags);
> -
> ddp_cmdq_cb_out:
>
> + if (mtk_crtc->pending_needs_vblank) {
> + mtk_crtc_finish_page_flip(mtk_crtc);
> + mtk_crtc->pending_needs_vblank = false;
> + }
> +
> + spin_unlock_irqrestore(&mtk_crtc->config_lock, flags);
> +
> mtk_crtc->cmdq_vblank_cnt = 0;
> wake_up(&mtk_crtc->cb_blocking_queue);
> }
> @@ -584,6 +592,10 @@ static void mtk_crtc_update_config(struct mtk_crtc *mtk_crtc, bool needs_vblank)
> mtk_mutex_acquire(mtk_crtc->mutex);
> mtk_crtc_ddp_config(crtc, NULL);
> mtk_mutex_release(mtk_crtc->mutex);
> +
> + spin_lock_irqsave(&mtk_crtc->config_lock, flags);
> + mtk_crtc->config_updating = false;
> + spin_unlock_irqrestore(&mtk_crtc->config_lock, flags);
> }
> #if IS_REACHABLE(CONFIG_MTK_CMDQ)
> if (mtk_crtc->cmdq_client.chan) {
> @@ -606,13 +618,14 @@ static void mtk_crtc_update_config(struct mtk_crtc *mtk_crtc, bool needs_vblank)
> */
> mtk_crtc->cmdq_vblank_cnt = 3;
>
> + spin_lock_irqsave(&mtk_crtc->config_lock, flags);
> + mtk_crtc->config_updating = false;
> + spin_unlock_irqrestore(&mtk_crtc->config_lock, flags);
> +
> mbox_send_message(mtk_crtc->cmdq_client.chan, cmdq_handle);
> mbox_client_txdone(mtk_crtc->cmdq_client.chan, 0);
> }
> #endif
> - spin_lock_irqsave(&mtk_crtc->config_lock, flags);
> - mtk_crtc->config_updating = false;
> - spin_unlock_irqrestore(&mtk_crtc->config_lock, flags);
For the CPU case (SoC has no shadow register and CONFIG_MTK_CMDQ is not enable),
This code is necessary.
Maybe keep these code or some modification for CPU case.
Regards,
CK
>
> mutex_unlock(&mtk_crtc->hw_lock);
> }
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