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Message-ID: <20241211155637.yooehsxb6oskl464@thinkpad>
Date: Wed, 11 Dec 2024 21:26:37 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Jeffrey Hugo <quic_jhugo@...cinc.com>
Cc: Vivek Pernamitta <quic_vpernami@...cinc.com>, quic_krichai@...cinc.com,
mhi@...ts.linux.dev, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4] bus: mhi: host: pci_generic: Add support for QDU100
device
On Wed, Dec 11, 2024 at 08:24:18AM -0700, Jeffrey Hugo wrote:
> On 12/10/2024 11:41 PM, Manivannan Sadhasivam wrote:
> > On Mon, Dec 09, 2024 at 11:09:50AM +0530, Vivek Pernamitta wrote:
> > > Add MHI controller configuration for QDU100 device.
> > >
> > > The Qualcomm X100 5G RAN Accelerator card is designed to enhance Open vRAN
> > > servers by offloading CPUs from intensive 5G baseband functions.
> > >
> > > Link: https://docs.qualcomm.com/bundle/publicresource/87-79371-1_REV_A_Qualcomm_X100_5G_RAN_Accelerator_Card_Product_Brief.pdf
> > >
> > > Signed-off-by: Vivek Pernamitta <quic_vpernami@...cinc.com>
> > > ---
> > > changes from V3:
> > > - Removed IP_SW1 and IP_SW2 support currently, will add once
> > > SW_IP1/2 channels support are added to mhi-net driver.
> > > - Removed qdu100 edl images, as EDL images are not needed.
> > > - Added space inbetween kernel_ulong_t and mhi_qcom_qdu100_info.
> > > - QDU100 XBL FW images were pushed to linux-firmware git repo
> > > https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/qcom/qdu100
> > >
> > > changes from V2:
> > > - updated commit text.
> > >
> > > changes from V1:
> > > - Changing naming convention from modem_qcom_qdu100*
> > > to mhi_qcom_qdu100*.
> > > - Updated commit text.
> > > - Fixed and corrected by passing mhi_pci_dev_info struct
> > > instead of mhi_controller_config.
> > > ---
> > >
> > > ---
> > > drivers/bus/mhi/host/pci_generic.c | 55 ++++++++++++++++++++++++++++++++++++++
> > > 1 file changed, 55 insertions(+)
> > >
> > > diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
> > > index 07645ce2119a71c9277356e962252b840379cd81..dee9fa9e7ae441fbc9a86e53694568c0ba192002 100644
> > > --- a/drivers/bus/mhi/host/pci_generic.c
> > > +++ b/drivers/bus/mhi/host/pci_generic.c
> > > @@ -245,6 +245,58 @@ struct mhi_pci_dev_info {
> > > .channel = ch_num, \
> > > }
> > > +static const struct mhi_channel_config mhi_qcom_qdu100_channels[] = {
> > > + MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 32, 2),
> > > + MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 32, 2),
> > > + MHI_CHANNEL_CONFIG_UL_SBL(2, "SAHARA", 128, 1),
> > > + MHI_CHANNEL_CONFIG_DL_SBL(3, "SAHARA", 128, 1),
> > > + MHI_CHANNEL_CONFIG_UL(4, "DIAG", 64, 3),
> > > + MHI_CHANNEL_CONFIG_DL(5, "DIAG", 64, 3),
> > > + MHI_CHANNEL_CONFIG_UL(9, "QDSS", 64, 3),
> > > + MHI_CHANNEL_CONFIG_UL(14, "NMEA", 32, 4),
> > > + MHI_CHANNEL_CONFIG_DL(15, "NMEA", 32, 4),
> > > + MHI_CHANNEL_CONFIG_UL(16, "CSM_CTRL", 32, 4),
> > > + MHI_CHANNEL_CONFIG_DL(17, "CSM_CTRL", 32, 4),
> > > + MHI_CHANNEL_CONFIG_UL(40, "MHI_PHC", 32, 4),
> > > + MHI_CHANNEL_CONFIG_DL(41, "MHI_PHC", 32, 4),
> > > + MHI_CHANNEL_CONFIG_UL(46, "IP_SW0", 256, 5),
> > > + MHI_CHANNEL_CONFIG_DL(47, "IP_SW0", 256, 5),
> > > +};
> > > +
> > > +static struct mhi_event_config mhi_qcom_qdu100_events[] = {
> > > + /* first ring is control+data ring */
> > > + MHI_EVENT_CONFIG_CTRL(0, 64),
> > > + /* SAHARA dedicated event ring */
> > > + MHI_EVENT_CONFIG_SW_DATA(1, 256),
> > > + /* Software channels dedicated event ring */
> > > + MHI_EVENT_CONFIG_SW_DATA(2, 64),
> > > + MHI_EVENT_CONFIG_SW_DATA(3, 256),
> > > + MHI_EVENT_CONFIG_SW_DATA(4, 256),
> > > + /* Software IP channels dedicated event ring */
> > > + MHI_EVENT_CONFIG_SW_DATA(5, 512),
> > > + MHI_EVENT_CONFIG_SW_DATA(6, 512),
> > > + MHI_EVENT_CONFIG_SW_DATA(7, 512),
> > > +};
> > > +
> > > +static const struct mhi_controller_config mhi_qcom_qdu100_config = {
> > > + .max_channels = 128,
> > > + .timeout_ms = 120000,
> > > + .num_channels = ARRAY_SIZE(mhi_qcom_qdu100_channels),
> > > + .ch_cfg = mhi_qcom_qdu100_channels,
> > > + .num_events = ARRAY_SIZE(mhi_qcom_qdu100_events),
> > > + .event_cfg = mhi_qcom_qdu100_events,
> > > +};
> > > +
> > > +static const struct mhi_pci_dev_info mhi_qcom_qdu100_info = {
> > > + .name = "qcom-qdu100",
> > > + .fw = "qcom/qdu100/xbl_s.melf",
> >
> > Can you first push this fw to linux-firmware? I haven't enforced this
> > requirement earlier, but that was my mistake.
>
> Mani, this is already done. There is a handy link in the change log. Did
> you miss that, or is there something still missing?
>
Oops. I missed it indeed. Please ignore my above comment.
- Mani
--
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