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Message-ID: <Z1q0CuDXe8VFuBfZ@shell.armlinux.org.uk>
Date: Thu, 12 Dec 2024 09:59:38 +0000
From: "Russell King (Oracle)" <linux@...linux.org.uk>
To: Chris Packham <chris.packham@...iedtelesis.co.nz>
Cc: lee@...nel.org, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, andrew+netdev@...n.ch, davem@...emloft.net,
edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com,
tsbogend@...ha.franken.de, hkallweit1@...il.com,
markus.stockhausen@....de, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
linux-mips@...r.kernel.org
Subject: Re: [PATCH 4/4] net: mdio: Add RTL9300 MDIO driver
On Thu, Dec 12, 2024 at 12:53:42PM +1300, Chris Packham wrote:
> +#define SMI_GLB_CTRL 0x000
> +#define GLB_CTRL_INTF_SEL(intf) BIT(16 + (intf))
> +#define SMI_PORT0_15_POLLING_SEL 0x008
> +#define SMI_ACCESS_PHY_CTRL_0 0x170
> +#define SMI_ACCESS_PHY_CTRL_1 0x174
> +#define PHY_CTRL_RWOP BIT(2)
Presumably, reading the code, this bit is set when writing?
> +#define PHY_CTRL_TYPE BIT(1)
Presumably, reading the code, this bit indicates we want to use clause
45?
> +#define PHY_CTRL_CMD BIT(0)
> +#define PHY_CTRL_FAIL BIT(25)
> +#define SMI_ACCESS_PHY_CTRL_2 0x178
> +#define SMI_ACCESS_PHY_CTRL_3 0x17c
> +#define SMI_PORT0_5_ADDR_CTRL 0x180
> +
> +#define MAX_PORTS 32
> +#define MAX_SMI_BUSSES 4
> +
> +struct realtek_mdio_priv {
> + struct regmap *regmap;
> + u8 smi_bus[MAX_PORTS];
> + u8 smi_addr[MAX_PORTS];
> + bool smi_bus_isc45[MAX_SMI_BUSSES];
Not sure about the support for !C45 - you appear to set this if you
find a PHY as a child of this device which has the PHY C45 compatible,
but as you don't populate the C22 MDIO bus operations, I'm not sure
how a C22 PHY can work.
> + u32 reg_base;
> +};
> +
> +static int realtek_mdio_wait_ready(struct realtek_mdio_priv *priv)
> +{
> + u32 val;
> +
> + return regmap_read_poll_timeout(priv->regmap, priv->reg_base + SMI_ACCESS_PHY_CTRL_1,
> + val, !(val & PHY_CTRL_CMD), 10, 500);
> +}
> +
> +static int realtek_mdio_read_c45(struct mii_bus *bus, int phy_id, int dev_addr, int regnum)
> +{
> + struct realtek_mdio_priv *priv = bus->priv;
> + u32 val;
> + int err;
> +
> + err = realtek_mdio_wait_ready(priv);
> + if (err)
> + return err;
> +
> + err = regmap_write(priv->regmap, priv->reg_base + SMI_ACCESS_PHY_CTRL_2, phy_id << 16);
> + if (err)
> + return err;
> +
> + err = regmap_write(priv->regmap, priv->reg_base + SMI_ACCESS_PHY_CTRL_3,
> + dev_addr << 16 | (regnum & 0xffff));
> + if (err)
> + return err;
> +
> + err = regmap_write(priv->regmap, priv->reg_base + SMI_ACCESS_PHY_CTRL_1,
> + PHY_CTRL_TYPE | PHY_CTRL_CMD);
> + if (err)
> + return err;
Maybe consider using a local variable for "regmap" and "reg_base" to
reduce the line length/wrapping?
> +static int realtek_mdiobus_init(struct realtek_mdio_priv *priv)
> +{
> + u32 port_addr[5] = { };
> + u32 poll_sel[2] = { 0, 0 };
> + u32 glb_ctrl_mask = 0, glb_ctrl_val = 0;
Please use reverse Christmas tree order.
> + int i, err;
> +
> + for (i = 0; i < MAX_PORTS; i++) {
> + int pos;
> +
> + if (priv->smi_bus[i] > 3)
> + continue;
> +
> + pos = (i % 6) * 5;
> + port_addr[i / 6] |= priv->smi_addr[i] << pos;
s/ / /
> +
> + pos = (i % 16) * 2;
> + poll_sel[i / 16] |= priv->smi_bus[i] << pos;
> + }
> +
> + for (i = 0; i < MAX_SMI_BUSSES; i++) {
> + if (priv->smi_bus_isc45[i]) {
> + glb_ctrl_mask |= GLB_CTRL_INTF_SEL(i);
> + glb_ctrl_val |= GLB_CTRL_INTF_SEL(i);
> + }
> + }
> +
> + err = regmap_bulk_write(priv->regmap, priv->reg_base + SMI_PORT0_5_ADDR_CTRL,
> + port_addr, 5);
> + if (err)
> + return err;
> +
> + err = regmap_bulk_write(priv->regmap, priv->reg_base + SMI_PORT0_15_POLLING_SEL,
> + poll_sel, 2);
> + if (err)
> + return err;
> +
> + err = regmap_update_bits(priv->regmap, priv->reg_base + SMI_GLB_CTRL,
> + glb_ctrl_mask, glb_ctrl_val);
> + if (err)
> + return err;
> +
> + return 0;
> +}
> +
> +static int realtek_mdiobus_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct realtek_mdio_priv *priv;
> + struct fwnode_handle *child;
> + struct mii_bus *bus;
> + int err;
> +
> + bus = devm_mdiobus_alloc_size(dev, sizeof(*priv));
> + if (!bus)
> + return -ENOMEM;
> +
> + bus->name = "Reaktek Switch MDIO Bus";
> + bus->read_c45 = realtek_mdio_read_c45;
> + bus->write_c45 = realtek_mdio_write_c45;
> + bus->parent = dev;
> + priv = bus->priv;
> +
> + priv->regmap = syscon_node_to_regmap(dev->parent->of_node);
> + if (IS_ERR(priv->regmap))
> + return PTR_ERR(priv->regmap);
> +
> + err = device_property_read_u32(dev, "reg", &priv->reg_base);
> + if (err)
> + return err;
> +
> + snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev));
> +
> + device_for_each_child_node(dev, child) {
> + u32 pn, smi_addr[2];
> +
> + err = fwnode_property_read_u32(child, "reg", &pn);
> + if (err)
> + return err;
> +
> + if (pn > MAX_PORTS)
> + return dev_err_probe(dev, -EINVAL, "illegal port number %d\n", pn);
You validate the port number.
> +
> + err = fwnode_property_read_u32_array(child, "realtek,smi-address", smi_addr, 2);
> + if (err) {
> + smi_addr[0] = 0;
> + smi_addr[1] = pn;
> + }
You don't validate the "smi_addr", so:
realtek,smi-address = <4, ...>;
would silently overflow priv->smi_bus_isc45. However, I haven't checked
whether the binding would warn about this.
Thanks.
--
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