linux-kernel - [PATCH 08/10] x86/fpu: Move CPUID leaf definitions to common code

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20241213205037.43C57CDE@davehans-spike.ostc.intel.com>
Date: Fri, 13 Dec 2024 12:50:37 -0800
From: Dave Hansen <dave.hansen@...ux.intel.com>
To: linux-kernel@...r.kernel.org
Cc: x86@...nel.org,tglx@...utronix.de,bp@...en8.de,rafael@...nel.org,lenb@...nel.org,dave.jiang@...el.com,irenic.rajneesh@...il.com,david.e.box@...el.com,Dave Hansen <dave.hansen@...ux.intel.com>,zhao1.liu@...el.com
Subject: [PATCH 08/10] x86/fpu: Move CPUID leaf definitions to common code


From: Dave Hansen <dave.hansen@...ux.intel.com>

Move the XSAVE-related CPUID leaf definitions to common code.  Then,
use the new definition to remove the last magic number from the CPUID
level dependency table.

Signed-off-by: Dave Hansen <dave.hansen@...ux.intel.com>
Reviewed-by: Zhao Liu <zhao1.liu@...el.com>
---

 b/arch/x86/include/asm/cpuid.h      |    2 ++
 b/arch/x86/include/asm/fpu/xstate.h |    4 ----
 b/arch/x86/kernel/cpu/common.c      |    2 +-
 b/arch/x86/kernel/fpu/xstate.c      |    1 +
 4 files changed, 4 insertions(+), 5 deletions(-)

diff -puN arch/x86/include/asm/cpuid.h~xsave-leaf-checks-1 arch/x86/include/asm/cpuid.h
--- a/arch/x86/include/asm/cpuid.h~xsave-leaf-checks-1	2024-12-13 12:45:36.351203168 -0800
+++ b/arch/x86/include/asm/cpuid.h	2024-12-13 12:45:36.359203508 -0800
@@ -23,8 +23,10 @@ enum cpuid_regs_idx {
 
 #define CPUID_MWAIT_LEAF	0x5
 #define CPUID_DCA_LEAF		0x9
+#define XSTATE_CPUID		0x0d
 #define CPUID_TSC_LEAF		0x15
 #define CPUID_FREQ_LEAF		0x16
+#define TILE_CPUID		0x1d
 
 #ifdef CONFIG_X86_32
 bool have_cpuid_p(void);
diff -puN arch/x86/include/asm/fpu/xstate.h~xsave-leaf-checks-1 arch/x86/include/asm/fpu/xstate.h
--- a/arch/x86/include/asm/fpu/xstate.h~xsave-leaf-checks-1	2024-12-13 12:45:36.355203337 -0800
+++ b/arch/x86/include/asm/fpu/xstate.h	2024-12-13 12:45:36.359203508 -0800
@@ -12,10 +12,6 @@
 /* Bit 63 of XCR0 is reserved for future expansion */
 #define XFEATURE_MASK_EXTEND	(~(XFEATURE_MASK_FPSSE | (1ULL << 63)))
 
-#define XSTATE_CPUID		0x0000000d
-
-#define TILE_CPUID		0x0000001d
-
 #define FXSAVE_SIZE	512
 
 #define XSAVE_HDR_SIZE	    64
diff -puN arch/x86/kernel/cpu/common.c~xsave-leaf-checks-1 arch/x86/kernel/cpu/common.c
--- a/arch/x86/kernel/cpu/common.c~xsave-leaf-checks-1	2024-12-13 12:45:36.355203337 -0800
+++ b/arch/x86/kernel/cpu/common.c	2024-12-13 12:45:36.359203508 -0800
@@ -639,7 +639,7 @@ static const struct cpuid_dependent_feat
 cpuid_dependent_features[] = {
 	{ X86_FEATURE_MWAIT,		CPUID_MWAIT_LEAF },
 	{ X86_FEATURE_DCA,		CPUID_DCA_LEAF },
-	{ X86_FEATURE_XSAVE,		0x0000000d },
+	{ X86_FEATURE_XSAVE,		XSTATE_CPUID },
 	{ 0, 0 }
 };
 
diff -puN arch/x86/kernel/fpu/xstate.c~xsave-leaf-checks-1 arch/x86/kernel/fpu/xstate.c
--- a/arch/x86/kernel/fpu/xstate.c~xsave-leaf-checks-1	2024-12-13 12:45:36.359203508 -0800
+++ b/arch/x86/kernel/fpu/xstate.c	2024-12-13 12:45:36.359203508 -0800
@@ -20,6 +20,7 @@
 #include <asm/fpu/signal.h>
 #include <asm/fpu/xcr.h>
 
+#include <asm/cpuid.h>
 #include <asm/tlbflush.h>
 #include <asm/prctl.h>
 #include <asm/elf.h>
_