lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <4476bfe9-41fb-4ec3-b352-624fba75cf3f@quicinc.com>
Date: Fri, 13 Dec 2024 14:59:45 +0800
From: Song Xue <quic_songxue@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
        Bjorn Andersson
	<andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring
	<robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
	<conor+dt@...nel.org>,
        Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
CC: <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <kernel@...cinc.com>,
        Krishna Kurapati
	<krishna.kurapati@....qualcomm.com>
Subject: Re: [PATCH v2 2/2] arm64: dts: qcom: Enable secondary USB controller
 on QCS615 Ride



On 12/13/2024 2:14 AM, Konrad Dybcio wrote:
> On 11.12.2024 9:26 AM, Song Xue wrote:
>> From: Krishna Kurapati <krishna.kurapati@....qualcomm.com>
>>
>> Enable secondary USB controller on QCS615 Ride platform. The secondary
>> USB controller is made "host", as it is a Type-A port.
>>
>> Signed-off-by: Krishna Kurapati <krishna.kurapati@....qualcomm.com>
>> Co-developed-by: Song Xue <quic_songxue@...cinc.com>
>> Signed-off-by: Song Xue <quic_songxue@...cinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/qcs615-ride.dts | 28 ++++++++++++++++++++++++++++
>>   1 file changed, 28 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>> index f41319ff47b983d771da52775fa78b4385c4e532..26ce0496d13ccbfea392c6d50d9edcab85fbc653 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>> +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>> @@ -203,6 +203,15 @@ &gcc {
>>   		 <&sleep_clk>;
>>   };
>>   
>> +&pm8150_gpios {
>> +	usb2_en_state: usb2-en-state {
>> +		pins = "gpio10";
>> +		function = "normal";
>> +		output-high;
>> +		power-source = <0>;
>> +	};
> 
> Does this go to an enable pin of a vreg / switch?

Thanks for comment.
We go to enable the pin of PMIC chip. The pin of PMIC is connecting to 
host-enable pin of USB converter. Need pin of PMIC chip to be high 
level, when USB is as host mode.
> 
> I think we settled on describing such cases as fixed regulators
> (that are always-on for now) - would you remember, +Dmitry?
> 
> The rest looks good.
> 
> Konrad


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ