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Message-ID: <Z1vzddhyrnwq7Sl_@hovoldconsulting.com>
Date: Fri, 13 Dec 2024 09:42:29 +0100
From: Johan Hovold <johan@...nel.org>
To: Konrad Dybcio <konradybcio@...nel.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
Sibi Sankar <quic_sibis@...cinc.com>,
Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
Rajendra Nayak <quic_rjendra@...cinc.com>,
Marijn Suijten <marijn.suijten@...ainline.org>,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
stable@...r.kernel.org
Subject: Re: [PATCH v2] soc: qcom: llcc: Enable LLCC_WRCACHE at boot on X1
On Thu, Dec 12, 2024 at 05:32:24PM +0100, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
>
> Do so in accordance with the internal recommendations.
Your commit message is still incomplete as it does not really say
anything about what this patch does, why this is needed or what the
implications are if not merging this patch.
How would one determine that this patch is a valid candidate for
backporting, for example.
> Fixes: b3cf69a43502 ("soc: qcom: llcc: Add configuration data for X1E80100")
> Cc: stable@...r.kernel.org
> Reviewed-by: Rajendra Nayak <quic_rjendra@...cinc.com>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
> ---
> Changes in v2:
> - Cc stable
> - Add more context lines
> - Pick up r-b
> - Link to v1: https://lore.kernel.org/r/20241207-topic-llcc_x1e_wrcache-v1-1-232e6aff49e4@oss.qualcomm.com
> ---
> drivers/soc/qcom/llcc-qcom.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
> index 32c3bc887cefb87c296e3ba67a730c87fa2fa346..1560db00a01248197e5c2936e785a5ea77f74ad8 100644
> --- a/drivers/soc/qcom/llcc-qcom.c
> +++ b/drivers/soc/qcom/llcc-qcom.c
> @@ -2997,20 +2997,21 @@ static const struct llcc_slice_config x1e80100_data[] = {
> .bonus_ways = 0xfff,
> .cache_mode = 0,
> }, {
> .usecase_id = LLCC_WRCACHE,
> .slice_id = 31,
> .max_cap = 1024,
> .priority = 1,
> .fixed_size = true,
> .bonus_ways = 0xfff,
> .cache_mode = 0,
> + .activate_on_init = true,
If this is so obviously correct, why isn't this flag set for
LLCC_WRCACHE for all the SoCs?
Johan
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