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Message-ID: <4e59d81c-4af1-407b-a9c5-4b36eee35f96@alliedtelesis.co.nz>
Date: Fri, 13 Dec 2024 13:56:52 +1300
From: Chris Packham <chris.packham@...iedtelesis.co.nz>
To: Andrew Lunn <andrew@...n.ch>
Cc: lee@...nel.org, robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
 andrew+netdev@...n.ch, davem@...emloft.net, edumazet@...gle.com,
 kuba@...nel.org, pabeni@...hat.com, tsbogend@...ha.franken.de,
 hkallweit1@...il.com, linux@...linux.org.uk, markus.stockhausen@....de,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 netdev@...r.kernel.org, linux-mips@...r.kernel.org
Subject: Re: [PATCH 1/4] dt-bindings: net: Add Realtek MDIO controller

Hi Andrew,

On 13/12/2024 06:13, Andrew Lunn wrote:
>> +      realtek,smi-address:
>> +        $ref: /schemas/types.yaml#/definitions/uint32-array
>> +        description: SMI interface and address for the connected PHY
>> +        items:
>> +          - description: SMI interface number associated with the port.
>> +          - description: SMI address of the PHY for the port.
> Is the hardware really random here with its mapping of PHYs?
> Generally, hardware is pretty predictable, logical. I'm just wondering
> if this property is really required, or if it can be replaced with
> some logic, avoiding typ0s.

The hardware is pretty flexible in this respect. You can pretty 
arbitrarily arrange your PHYs. Not all ports support the same kind of 
SERDES interface but as far as the MDIO interface goes you can arrange 
things however you like.


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