lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Z1uOMdYiWz68LAPo@intel.com>
Date: Fri, 13 Dec 2024 09:30:25 +0800
From: Chao Gao <chao.gao@...el.com>
To: Sean Christopherson <seanjc@...gle.com>
CC: Paolo Bonzini <pbonzini@...hat.com>, Vitaly Kuznetsov
	<vkuznets@...hat.com>, Jarkko Sakkinen <jarkko@...nel.org>,
	<kvm@...r.kernel.org>, <linux-sgx@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, Maxim Levitsky <mlevitsk@...hat.com>, "Hou
 Wenlong" <houwenlong.hwl@...group.com>, Xiaoyao Li <xiaoyao.li@...el.com>,
	Kechen Lu <kechenl@...dia.com>, Oliver Upton <oliver.upton@...ux.dev>,
	"Binbin Wu" <binbin.wu@...ux.intel.com>, Yang Weijiang
	<weijiang.yang@...el.com>, Robert Hoo <robert.hoo.linux@...il.com>
Subject: Re: [PATCH v3 05/57] KVM: x86: Account for KVM-reserved CR4 bits
 when passing through CR4 on VMX

On Wed, Nov 27, 2024 at 05:33:32PM -0800, Sean Christopherson wrote:
>Drop x86.c's local pre-computed cr4_reserved bits and instead fold KVM's
>reserved bits into the guest's reserved bits.  This fixes a bug where VMX's
>set_cr4_guest_host_mask() fails to account for KVM-reserved bits when
>deciding which bits can be passed through to the guest.  In most cases,
>letting the guest directly write reserved CR4 bits is ok, i.e. attempting
>to set the bit(s) will still #GP, but not if a feature is available in
>hardware but explicitly disabled by the host, e.g. if FSGSBASE support is
>disabled via "nofsgsbase".
>
>Note, the extra overhead of computing host reserved bits every time
>userspace sets guest CPUID is negligible.  The feature bits that are
>queried are packed nicely into a handful of words, and so checking and
>setting each reserved bit costs in the neighborhood of ~5 cycles, i.e. the
>total cost will be in the noise even if the number of checked CR4 bits
>doubles over the next few years.  In other words, x86 will run out of CR4
>bits long before the overhead becomes problematic.
>
>Note #2, __cr4_reserved_bits() starts from CR4_RESERVED_BITS, which is
>why the existing __kvm_cpu_cap_has() processing doesn't explicitly OR in
>CR4_RESERVED_BITS (and why the new code doesn't do so either).
>
>Fixes: 2ed41aa631fc ("KVM: VMX: Intercept guest reserved CR4 bits to inject #GP fault")
>Reviewed-by: Maxim Levitsky <mlevitsk@...hat.com>
>Signed-off-by: Sean Christopherson <seanjc@...gle.com>

Reviewed-by: Chao Gao <chao.gao@...el.com>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ