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Message-Id: <20241215-v6-13-rc1-net-next-mv88e6xxx-rmu-ops-v1-2-87671db17a65@lunn.ch>
Date: Sun, 15 Dec 2024 17:30:04 +0000
From: Andrew Lunn <andrew@...n.ch>
To: Vladimir Oltean <olteanv@...il.com>, 
 "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, 
 Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, 
 Russell King <linux@...linux.org.uk>
Cc: netdev@...r.kernel.org, linux-kernel@...r.kernel.org, 
 Andrew Lunn <andrew@...n.ch>
Subject: [PATCH 2/3] net: dsa: mv88e6xxx: Enable RMU on 6165 family

The 6165 family allows the use of the RMU on ports 5 and 6.

Signed-off-by: Andrew Lunn <andrew@...n.ch>
---
 drivers/net/dsa/mv88e6xxx/chip.c    |  6 ++++++
 drivers/net/dsa/mv88e6xxx/global1.c | 25 +++++++++++++++++++++++++
 drivers/net/dsa/mv88e6xxx/global1.h |  7 +++++++
 3 files changed, 38 insertions(+)

diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 46f81b925208024b9029d6d674ebb5816a615e68..fe471ff4cd8ea8bb6654c61d0b95bb66c2e12157 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -4317,6 +4317,8 @@ static const struct mv88e6xxx_ops mv88e6123_ops = {
 	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
 	.pot_clear = mv88e6xxx_g2_pot_clear,
 	.reset = mv88e6352_g1_reset,
+	.rmu_disable = mv88e6165_g1_rmu_disable,
+	.rmu_enable = mv88e6165_g1_rmu_enable,
 	.atu_get_hash = mv88e6165_g1_atu_get_hash,
 	.atu_set_hash = mv88e6165_g1_atu_set_hash,
 	.vtu_getnext = mv88e6352_g1_vtu_getnext,
@@ -4467,6 +4469,8 @@ static const struct mv88e6xxx_ops mv88e6161_ops = {
 	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
 	.pot_clear = mv88e6xxx_g2_pot_clear,
 	.reset = mv88e6352_g1_reset,
+	.rmu_disable = mv88e6165_g1_rmu_disable,
+	.rmu_enable = mv88e6165_g1_rmu_enable,
 	.atu_get_hash = mv88e6165_g1_atu_get_hash,
 	.atu_set_hash = mv88e6165_g1_atu_set_hash,
 	.vtu_getnext = mv88e6352_g1_vtu_getnext,
@@ -4505,6 +4509,8 @@ static const struct mv88e6xxx_ops mv88e6165_ops = {
 	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,
 	.pot_clear = mv88e6xxx_g2_pot_clear,
 	.reset = mv88e6352_g1_reset,
+	.rmu_disable = mv88e6165_g1_rmu_disable,
+	.rmu_enable = mv88e6165_g1_rmu_enable,
 	.atu_get_hash = mv88e6165_g1_atu_get_hash,
 	.atu_set_hash = mv88e6165_g1_atu_set_hash,
 	.vtu_getnext = mv88e6352_g1_vtu_getnext,
diff --git a/drivers/net/dsa/mv88e6xxx/global1.c b/drivers/net/dsa/mv88e6xxx/global1.c
index ae0b6e5628184042404c208273ece55650cbc433..fcddba505ca3b8ddc0bc1a1e0576a5e08a51ef0e 100644
--- a/drivers/net/dsa/mv88e6xxx/global1.c
+++ b/drivers/net/dsa/mv88e6xxx/global1.c
@@ -555,6 +555,31 @@ int mv88e6085_g1_rmu_enable(struct mv88e6xxx_chip *chip, int port)
 				      MV88E6085_G1_CTL2_RM_ENABLE, val);
 }
 
+int mv88e6165_g1_rmu_disable(struct mv88e6xxx_chip *chip)
+{
+	return mv88e6xxx_g1_ctl2_mask(chip, MV88E6165_G1_CTL2_RMU_MODE_MASK,
+				      MV88E6165_G1_CTL2_RMU_DISABLED);
+}
+
+int mv88e6165_g1_rmu_enable(struct mv88e6xxx_chip *chip, int port)
+{
+	int val;
+
+	switch (port) {
+	case 4:
+		val = MV88E6165_G1_CTL2_RMU_MODE_PORT_4;
+		break;
+	case 5:
+		val = MV88E6165_G1_CTL2_RMU_MODE_PORT_5;
+		break;
+	default:
+		return -EOPNOTSUPP;
+	}
+
+	return mv88e6xxx_g1_ctl2_mask(chip, MV88E6165_G1_CTL2_RMU_MODE_MASK,
+				      val);
+}
+
 int mv88e6352_g1_rmu_disable(struct mv88e6xxx_chip *chip)
 {
 	return mv88e6xxx_g1_ctl2_mask(chip, MV88E6352_G1_CTL2_RMU_MODE_MASK,
diff --git a/drivers/net/dsa/mv88e6xxx/global1.h b/drivers/net/dsa/mv88e6xxx/global1.h
index 4624d1bdfc2430d51be747662a25e7b5325e8c79..b8a28afcdcd695c519679976d1361fb7235411a6 100644
--- a/drivers/net/dsa/mv88e6xxx/global1.h
+++ b/drivers/net/dsa/mv88e6xxx/global1.h
@@ -235,6 +235,11 @@
 #define MV88E6085_G1_CTL2_DA_CHECK		0x4000
 #define MV88E6085_G1_CTL2_P10RM			0x2000
 #define MV88E6085_G1_CTL2_RM_ENABLE		0x1000
+#define MV88E6165_G1_CTL2_RMU_MODE_MASK		0x0300
+#define MV88E6165_G1_CTL2_RMU_DISABLED	        0x0000
+#define MV88E6165_G1_CTL2_RMU_MODE_PORT_4	0x0100
+#define MV88E6165_G1_CTL2_RMU_MODE_PORT_5	0x0200
+#define MV88E6165_G1_CTL2_RMU_MODE_PORT_RECVD	0x0300
 #define MV88E6352_G1_CTL2_DA_CHECK		0x0800
 #define MV88E6390_G1_CTL2_RMU_MODE_MASK		0x0700
 #define MV88E6390_G1_CTL2_RMU_MODE_PORT_0	0x0000
@@ -317,6 +322,8 @@ int mv88e6185_g1_set_cascade_port(struct mv88e6xxx_chip *chip, int port);
 
 int mv88e6085_g1_rmu_disable(struct mv88e6xxx_chip *chip);
 int mv88e6085_g1_rmu_enable(struct mv88e6xxx_chip *chip, int port);
+int mv88e6165_g1_rmu_disable(struct mv88e6xxx_chip *chip);
+int mv88e6165_g1_rmu_enable(struct mv88e6xxx_chip *chip, int port);
 int mv88e6352_g1_rmu_disable(struct mv88e6xxx_chip *chip);
 int mv88e6352_g1_rmu_enable(struct mv88e6xxx_chip *chip, int port);
 int mv88e6390_g1_rmu_disable(struct mv88e6xxx_chip *chip);

-- 
2.45.2


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