linux-kernel - [GIT PULL] KVM changes for Linux 6.13-rc3

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Message-ID: <20241215084339.319122-1-pbonzini@redhat.com>
Date: Sun, 15 Dec 2024 03:43:39 -0500
From: Paolo Bonzini <pbonzini@...hat.com>
To: torvalds@...ux-foundation.org
Cc: linux-kernel@...r.kernel.org,
	kvm@...r.kernel.org
Subject: [GIT PULL] KVM changes for Linux 6.13-rc3

Linus,

The following changes since commit fac04efc5c793dccbd07e2d59af9f90b7fc0dca4:

  Linux 6.13-rc2 (2024-12-08 14:03:39 -0800)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/virt/kvm/kvm.git tags/for-linus

for you to fetch changes up to 3522c419758ee8dca5a0e8753ee0070a22157bc1:

  Merge tag 'kvm-riscv-fixes-6.13-1' of https://github.com/kvm-riscv/linux into HEAD (2024-12-13 13:59:20 -0500)

----------------------------------------------------------------
ARM64:

* Fix confusion with implicitly-shifted MDCR_EL2 masks breaking
  SPE/TRBE initialization.

* Align nested page table walker with the intended memory attribute
  combining rules of the architecture.

* Prevent userspace from constraining the advertised ASID width,
  avoiding horrors of guest TLBIs not matching the intended context in
  hardware.

* Don't leak references on LPIs when insertion into the translation
  cache fails.

RISC-V:

* Replace csr_write() with csr_set() for HVIEN PMU overflow bit.

x86:

* Cache CPUID.0xD XSTATE offsets+sizes during module init - On Intel's
  Emerald Rapids CPUID costs hundreds of cycles and there are a lot of
  leaves under 0xD.  Getting rid of the CPUIDs during nested VM-Enter and
  VM-Exit is planned for the next release, for now just cache them: even
  on Skylake that is 40% faster.

----------------------------------------------------------------
James Clark (1):
      arm64: Fix usage of new shifted MDCR_EL2 values

Keisuke Nishimura (1):
      KVM: arm64: vgic-its: Add error handling in vgic_its_cache_translation

Marc Zyngier (2):
      KVM: arm64: Fix S1/S2 combination when FWB==1 and S2 has Device memory type
      KVM: arm64: Do not allow ID_AA64MMFR0_EL1.ASIDbits to be overridden

Michael Neuling (1):
      RISC-V: KVM: Fix csr_write -> csr_set for HVIEN PMU overflow bit

Paolo Bonzini (2):
      Merge tag 'kvmarm-fixes-6.13-2' of https://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
      Merge tag 'kvm-riscv-fixes-6.13-1' of https://github.com/kvm-riscv/linux into HEAD

Sean Christopherson (1):
      KVM: x86: Cache CPUID.0xD XSTATE offsets+sizes during module init

 arch/arm64/include/asm/el2_setup.h |  4 ++--
 arch/arm64/kernel/hyp-stub.S       |  4 ++--
 arch/arm64/kvm/at.c                | 11 +++++++++--
 arch/arm64/kvm/hyp/nvhe/pkvm.c     |  4 ++--
 arch/arm64/kvm/sys_regs.c          |  3 ++-
 arch/arm64/kvm/vgic/vgic-its.c     | 12 +++++++++++-
 arch/riscv/kvm/aia.c               |  2 +-
 arch/x86/kvm/cpuid.c               | 31 ++++++++++++++++++++++++++-----
 arch/x86/kvm/cpuid.h               |  1 +
 arch/x86/kvm/x86.c                 |  2 ++
 10 files changed, 58 insertions(+), 16 deletions(-)