linux-kernel - Re: [PATCH] drm/amdgpu: Fix potential integer overflow in scheduler mask calculations

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Message-ID: <CADnq5_NroGebRLLpdde9kvyeer8JWo1Yy9_0An3DO6TosPMfqg@mail.gmail.com>
Date: Mon, 16 Dec 2024 13:47:51 -0500
From: Alex Deucher <alexdeucher@...il.com>
To: Karol Przybylski <karprzy7@...il.com>
Cc: alexander.deucher@....com, christian.koenig@....com, Xinhui.Pan@....com, 
	airlied@...il.com, simona@...ll.ch, srinivasan.shanmugam@....com, 
	Hawking.Zhang@....com, Jack.Xiao@....com, lijo.lazar@....com, 
	Jesse.zhang@....com, tao.zhou1@....com, amd-gfx@...ts.freedesktop.org, 
	dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] drm/amdgpu: Fix potential integer overflow in scheduler
 mask calculations

Applied.  Thanks!

On Sun, Dec 15, 2024 at 7:38 AM Karol Przybylski <karprzy7@...il.com> wrote:
>
> The use of 1 << i in scheduler mask calculations can result in an
> unintentional integer overflow due to the expression being
> evaluated as a 32-bit signed integer.
>
> This patch replaces 1 << i with 1ULL << i to ensure the operation
> is performed as a 64-bit unsigned integer, preventing overflow
>
> Discovered in coverity scan, CID 1636393, 1636175, 1636007, 1635853
>
> Fixes: c5c63d9cb5d3b drm/amdgpu: add amdgpu_gfx_sched_mask and amdgpu_compute_sched_mask debugfs
> Signed-off-by: Karol Przybylski <karprzy7@...il.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> index 69a6b6dba0a5..8fb6c5f6a060 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> @@ -2050,7 +2050,7 @@ static int amdgpu_debugfs_gfx_sched_mask_set(void *data, u64 val)
>         if (!adev)
>                 return -ENODEV;
>
> -       mask = (1 << adev->gfx.num_gfx_rings) - 1;
> +       mask = (1ULL << adev->gfx.num_gfx_rings) - 1;
>         if ((val & mask) == 0)
>                 return -EINVAL;
>
> @@ -2078,7 +2078,7 @@ static int amdgpu_debugfs_gfx_sched_mask_get(void *data, u64 *val)
>         for (i = 0; i < adev->gfx.num_gfx_rings; ++i) {
>                 ring = &adev->gfx.gfx_ring[i];
>                 if (ring->sched.ready)
> -                       mask |= 1 << i;
> +                       mask |= 1ULL << i;
>         }
>
>         *val = mask;
> @@ -2120,7 +2120,7 @@ static int amdgpu_debugfs_compute_sched_mask_set(void *data, u64 val)
>         if (!adev)
>                 return -ENODEV;
>
> -       mask = (1 << adev->gfx.num_compute_rings) - 1;
> +       mask = (1ULL << adev->gfx.num_compute_rings) - 1;
>         if ((val & mask) == 0)
>                 return -EINVAL;
>
> @@ -2149,7 +2149,7 @@ static int amdgpu_debugfs_compute_sched_mask_get(void *data, u64 *val)
>         for (i = 0; i < adev->gfx.num_compute_rings; ++i) {
>                 ring = &adev->gfx.compute_ring[i];
>                 if (ring->sched.ready)
> -                       mask |= 1 << i;
> +                       mask |= 1ULL << i;
>         }
>
>         *val = mask;
> --
> 2.34.1
>