linux-kernel - Re: [PATCH v3 1/3] dt-bindings: riscv: add bfloat16 ISA extension description

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Message-Id: <F52E8856-7602-4E4B-8932-2B13AAA30822@jrtc27.com>
Date: Mon, 16 Dec 2024 22:51:53 +0000
From: Jessica Clarke <jrtc27@...c27.com>
To: Samuel Holland <samuel.holland@...ive.com>
Cc: Inochi Amaoto <inochiama@...il.com>,
 linux-doc@...r.kernel.org,
 linux-riscv@...ts.infradead.org,
 linux-kernel@...r.kernel.org,
 devicetree@...r.kernel.org,
 Yixun Lan <dlan@...too.org>,
 Longbin Li <looong.bin@...il.com>,
 Conor Dooley <conor.dooley@...rochip.com>,
 Chen Wang <unicorn_wang@...look.com>,
 Jonathan Corbet <corbet@....net>,
 Paul Walmsley <paul.walmsley@...ive.com>,
 Palmer Dabbelt <palmer@...belt.com>,
 Albert Ou <aou@...s.berkeley.edu>,
 Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>,
 Clément Léger <cleger@...osinc.com>,
 Evan Green <evan@...osinc.com>,
 Charlie Jenkins <charlie@...osinc.com>,
 Andrew Jones <ajones@...tanamicro.com>,
 Jesse Taube <jesse@...osinc.com>,
 Andy Chiu <andybnac@...il.com>,
 Alexandre Ghiti <alexghiti@...osinc.com>,
 Yong-Xuan Wang <yongxuan.wang@...ive.com>
Subject: Re: [PATCH v3 1/3] dt-bindings: riscv: add bfloat16 ISA extension
 description

On 16 Dec 2024, at 22:00, Samuel Holland <samuel.holland@...ive.com> wrote:
> 
> On 2024-12-05 11:58 PM, Inochi Amaoto wrote:
>> Add description for the BFloat16 precision Floating-Point ISA extension,
>> (Zfbfmin, Zvfbfmin, Zvfbfwma). which was ratified in commit 4dc23d62
>> ("Added Chapter title to BF16") of the riscv-isa-manual.
>> 
>> Signed-off-by: Inochi Amaoto <inochiama@...il.com>
>> Acked-by: Conor Dooley <conor.dooley@...rochip.com>
>> ---
>> .../devicetree/bindings/riscv/extensions.yaml | 45 +++++++++++++++++++
>> 1 file changed, 45 insertions(+)
>> 
>> diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
>> index 9c7dd7e75e0c..0a1f1a76d129 100644
>> --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
>> +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
>> @@ -329,6 +329,12 @@ properties:
>>             instructions, as ratified in commit 056b6ff ("Zfa is ratified") of
>>             riscv-isa-manual.
>> 
>> +        - const: zfbfmin
>> +          description:
>> +            The standard Zfbfmin extension which provides minimal support for
>> +            16-bit half-precision brain floating-point instructions, as ratified
> 
> I think you mean "binary" here and in the entries below, not "brain”.

No, that’s Zfhmin / FP16 / binary16, not Zfbfmin / BF16 / BFloat16? The
B is for Brain as it came out of Google Brain.

https://en.wikipedia.org/wiki/Bfloat16_floating-point_format

Jess