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Message-ID: <d5badfcf-58d7-49d4-8a5a-d31de498f015@oss.nxp.com>
Date: Tue, 17 Dec 2024 16:19:33 +0200
From: Larisa Ileana Grigore <larisa.grigore@....nxp.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Frank.Li@....com
Cc: dmaengine@...r.kernel.org, imx@...ts.linux.dev,
 linux-kernel@...r.kernel.org, s32@....com,
 Christophe Lizzi <clizzi@...hat.com>, Alberto Ruiz <aruizrui@...hat.com>,
 Enric Balletbo <eballetb@...hat.com>
Subject: Re: [PATCH 7/8] dmaengine: fsl-edma: wait until no hardware request
 is in progress

On 12/17/2024 7:27 AM, Krzysztof Kozlowski wrote:
> [You don't often get email from krzk@...nel.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
> 
> On 16/12/2024 08:58, Larisa Grigore wrote:
>> Wait DMA hardware complete cleanup work by checking HRS bit before
>> disabling the channel to make sure trail data is already written to
>> memory.
>>
>> Fixes: 72f5801a4e2b7 ("dmaengine: fsl-edma: integrate v3 support")
> 
> Why Fixes are at the end of the patchset? They must be either separate
> patchset or first patches.
> 
> Best regards,
> Krzysztof

Thank you for you review Krzysztof! Indeed, this commit should be moved 
right after "dmaengine: fsl-edma: add eDMAv3 registers to edma_regs" 
which introduces the eDMA V3 specific registers including HRS.
I will move it in the next version.

Best regards,
Larisa

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