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Message-ID: <20241217154345.276919-33-angelogioacchino.delregno@collabora.com>
Date: Tue, 17 Dec 2024 16:43:44 +0100
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: chunkuang.hu@...nel.org
Cc: p.zabel@...gutronix.de,
airlied@...il.com,
simona@...ll.ch,
maarten.lankhorst@...ux.intel.com,
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matthias.bgg@...il.com,
angelogioacchino.delregno@...labora.com,
ck.hu@...iatek.com,
jitao.shi@...iatek.com,
jie.qiu@...iatek.com,
junzhi.zhao@...iatek.com,
dri-devel@...ts.freedesktop.org,
linux-mediatek@...ts.infradead.org,
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Subject: [PATCH v3 32/33] drm/mediatek: mtk_hdmi_common: Add var to enable interlaced modes
Add an interlace_allowed bool member to struct mtk_hdmi_ver_conf
which will be used to signal whether interlaced modes are supported
by the bridge (in our case, the HDMI IP), and enable it for HDMIv2.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
---
drivers/gpu/drm/mediatek/mtk_hdmi_common.c | 1 +
drivers/gpu/drm/mediatek/mtk_hdmi_common.h | 1 +
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c | 3 ++-
3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_common.c b/drivers/gpu/drm/mediatek/mtk_hdmi_common.c
index c076e4efcd29..40b4b1d1c837 100644
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_common.c
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_common.c
@@ -424,6 +424,7 @@ struct mtk_hdmi *mtk_hdmi_common_probe(struct platform_device *pdev)
hdmi->bridge.ddc = hdmi->ddc_adpt;
hdmi->bridge.vendor = "MediaTek";
hdmi->bridge.product = "On-Chip HDMI";
+ hdmi->bridge.interlace_allowed = ver_conf->interlace_allowed;
ret = devm_drm_bridge_add(dev, &hdmi->bridge);
if (ret)
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_common.h b/drivers/gpu/drm/mediatek/mtk_hdmi_common.h
index e74fe1371324..de5e064585f8 100644
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_common.h
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_common.h
@@ -137,6 +137,7 @@ struct mtk_hdmi_ver_conf {
const struct hdmi_codec_ops *codec_ops;
const char * const *mtk_hdmi_clock_names;
int num_clocks;
+ bool interlace_allowed;
};
struct mtk_hdmi_conf {
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c b/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
index c71ecc3c1711..5b708fcc0e03 100644
--- a/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
+++ b/drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
@@ -1306,7 +1306,8 @@ static const struct mtk_hdmi_ver_conf mtk_hdmi_conf_v2 = {
.bridge_funcs = &mtk_v2_hdmi_bridge_funcs,
.codec_ops = &mtk_hdmi_v2_audio_codec_ops,
.mtk_hdmi_clock_names = mtk_hdmi_v2_clk_names,
- .num_clocks = MTK_HDMI_V2_CLK_COUNT
+ .num_clocks = MTK_HDMI_V2_CLK_COUNT,
+ .interlace_allowed = true
};
static const struct mtk_hdmi_conf mtk_hdmi_conf_mt8188 = {
--
2.47.0
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