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Message-ID: <e7ca1f47-8ccd-44b4-bfdd-707a1f8aef13@quicinc.com>
Date: Tue, 17 Dec 2024 15:47:42 +0800
From: Jinlong Mao <quic_jinlmao@...cinc.com>
To: Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>,
        Bjorn Andersson <quic_bjorande@...cinc.com>,
        Geert Uytterhoeven
	<geert+renesas@...der.be>,
        Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Neil Armstrong
	<neil.armstrong@...aro.org>,
        Arnd Bergmann <arnd@...db.de>
CC: <linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5] arm64: defconfig: Enable STM protocol and source
 configs



On 2024/11/1 16:45, Mao Jinlong wrote:
> STM is used for logging useful softevens from various entities.
> With STM and TMC sink enabled, there will be more buffer size to store
> the logs. STM source and STM protocol need to be configured along with
> STM device for STM function refer to Documentation/trace/stm.rst.
> CONFIG_CORESIGHT_STM is already added as module. Add Coresight STM
> source and Protocol configs as module so that STM functions can be
> used.
> 
> Signed-off-by: Mao Jinlong <quic_jinlmao@...cinc.com>
> ---
> Changes in v5:
> - Update commit message.
> 
> Changes in v4:
> - Remove Ftrace config.
> 
> Changes in v3:
> - update commit message.
> 
> Changes in v2:
> - select ftrace config explicitly.
>   arch/arm64/configs/defconfig | 5 +++++
>   1 file changed, 5 insertions(+)

Gentle reminder for the review.

> 
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index 5fdbfea7a5b2..ac11cd1a7c06 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -1599,6 +1599,11 @@ CONFIG_NVMEM_SNVS_LPGPR=y
>   CONFIG_NVMEM_SPMI_SDAM=m
>   CONFIG_NVMEM_SUNXI_SID=y
>   CONFIG_NVMEM_UNIPHIER_EFUSE=y
> +CONFIG_STM_PROTO_BASIC=m
> +CONFIG_STM_PROTO_SYS_T=m
> +CONFIG_STM_DUMMY=m
> +CONFIG_STM_SOURCE_CONSOLE=m
> +CONFIG_STM_SOURCE_HEARTBEAT=m
>   CONFIG_FPGA=y
>   CONFIG_FPGA_MGR_ALTERA_CVP=m
>   CONFIG_FPGA_MGR_STRATIX10_SOC=m




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