linux-kernel - Re: [PATCH v2 15/15] drm/mediatek: Introduce HDMI/DDC v2 for MT8195/MT8188

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Message-ID: <6ed3b9ee742dcf814f35e15d88db538480ba2d48.camel@mediatek.com>
Date: Tue, 17 Dec 2024 09:21:43 +0000
From: CK Hu (胡俊光) <ck.hu@...iatek.com>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
	"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>
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Subject: Re: [PATCH v2 15/15] drm/mediatek: Introduce HDMI/DDC v2 for
 MT8195/MT8188

Hi, Angelo:

On Thu, 2024-12-05 at 12:45 +0100, AngeloGioacchino Del Regno wrote:
> External email : Please do not click links or open attachments until you have verified the sender or the content.
> 
> 
> Add support for the newer HDMI-TX (Encoder) v2 and DDC v2 IPs
> found in MediaTek's MT8195, MT8188 SoC and their variants, and
> including support for display modes up to 4k60 and for HDMI
> Audio, as per the HDMI 2.0 spec.
> 
> HDCP and CEC functionalities are also supported by this hardware,
> but are not included in this commit and that also poses a slight
> difference between the V2 and V1 controllers in how they handle
> Hotplug Detection (HPD).
> 
> While the v1 controller was using the CEC controller to check
> HDMI cable connection and disconnection, in this driver the v2
> one does not.
> 
> This is due to the fact that on parts with v2 designs, like the
> MT8195 SoC, there is one CEC controller shared between the HDMI
> Transmitter (HDMI-TX) and Receiver (HDMI-RX): before eventually
> adding support to use the CEC HW to wake up the HDMI controllers
> it is necessary to have support for one TX, one RX *and* for both
> at the same time.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> ---

[snip]

> +static void mtk_hdmi_v2_bridge_pre_enable(struct drm_bridge *bridge,
> +                                         struct drm_bridge_state *old_state)
> +{
> +       struct mtk_hdmi *hdmi = hdmi_ctx_from_bridge(bridge);
> +       struct drm_atomic_state *state = old_state->base.state;
> +       struct drm_connector_state *conn_state;
> +       union phy_configure_opts opts = {
> +               .dp = { .link_rate = hdmi->mode.clock * KILO }
> +       };
> +
> +       /* Retrieve the connector through the atomic state */
> +       hdmi->curr_conn = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder);
> +
> +       conn_state = drm_atomic_get_new_connector_state(state, hdmi->curr_conn);
> +       if (WARN_ON(!conn_state))
> +               return;
> +
> +       /*
> +        * Preconfigure the HDMI controller and the HDMI PHY at pre_enable
> +        * stage to make sure that this IP is ready and clocked before the
> +        * mtk_dpi gets powered on and before it enables the output.

In patch [6/15], you does not power on DPI power in DPI driver.
Could you point out the code about 'mtk_dpi gets powered on'?

Regards,
CK

> +        */
> +       hdmi->dvi_mode = !hdmi->curr_conn->display_info.is_hdmi;
> +       mtk_hdmi_v2_output_set_display_mode(hdmi, &hdmi->mode);
> +
> +       /* Reconfigure phy clock link with appropriate rate */
> +       phy_configure(hdmi->phy, &opts);
> +
> +       /* Power on the PHY here to make sure that DPI_HDMI is clocked */
> +       phy_power_on(hdmi->phy);
> +
> +       hdmi->powered = true;
> +}
> +