linux-kernel - Re: [PATCH V2 06/46] arm64/sysreg: Add register fields for HDFGWTR2

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Message-ID: <8df1140d-5364-4979-b572-127067b18f90@redhat.com>
Date: Wed, 18 Dec 2024 16:11:39 +0100
From: Eric Auger <eauger@...hat.com>
To: Anshuman Khandual <anshuman.khandual@....com>,
 linux-kernel@...r.kernel.org, kvmarm@...ts.linux.dev,
 linux-arm-kernel@...ts.infradead.org, maz@...nel.org
Cc: ryan.roberts@....com, Oliver Upton <oliver.upton@...ux.dev>,
 James Morse <james.morse@....com>, Suzuki K Poulose
 <suzuki.poulose@....com>, Catalin Marinas <catalin.marinas@....com>,
 Will Deacon <will@...nel.org>, Mark Brown <broonie@...nel.org>
Subject: Re: [PATCH V2 06/46] arm64/sysreg: Add register fields for
 HDFGWTR2_EL2



On 12/10/24 06:52, Anshuman Khandual wrote:
> This adds register fields for HDFGWTR2_EL2 as per the definitions based
> on DDI0601 2024-09.
> 
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: Will Deacon <will@...nel.org>
> Cc: Mark Brown <broonie@...nel.org>
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: linux-kernel@...r.kernel.org
> Reviewed-by: Mark Brown <broonie@...nel.org>
Reviewed-by: Eric Auger <eric.auger@...hat.com>

Eric
> Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>
> ---
>  arch/arm64/tools/sysreg | 28 ++++++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
> 
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index a56f7384d0db..1a7d8c03f844 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -2591,6 +2591,34 @@ Field	1	nPMIAR_EL1
>  Field	0	nPMECR_EL1
>  EndSysreg
>  
> +Sysreg HDFGWTR2_EL2	3	4	3	1	1
> +Res0	63:25
> +Field	24	nPMBMAR_EL1
> +Field	23	nMDSTEPOP_EL1
> +Field	22	nTRBMPAM_EL1
> +Field	21	nPMZR_EL0
> +Field	20	nTRCITECR_EL1
> +Field	19	nPMSDSFR_EL1
> +Res0	18:17
> +Field	16	nSPMSCR_EL1
> +Field	15	nSPMACCESSR_EL1
> +Field	14	nSPMCR_EL0
> +Field	13	nSPMOVS
> +Field	12	nSPMINTEN
> +Field	11	nSPMCNTEN
> +Field	10	nSPMSELR_EL0
> +Field	9	nSPMEVTYPERn_EL0
> +Field	8	nSPMEVCNTRn_EL0
> +Field	7	nPMSSCR_EL1
> +Res0	6
> +Field	5	nMDSELR_EL1
> +Field	4	nPMUACR_EL1
> +Field	3	nPMICFILTR_EL0
> +Field	2	nPMICNTR_EL0
> +Field	1	nPMIAR_EL1
> +Field	0	nPMECR_EL1
> +EndSysreg
> +
>  Sysreg HDFGRTR_EL2	3	4	3	1	4
>  Field	63	PMBIDR_EL1
>  Field	62	nPMSNEVFR_EL1