linux-kernel - Re: [PATCH V2 11/46] arm64/sysreg: Add register fields for PMSIDR

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <a7988236-eb81-406d-a74a-5ad1355981e3@redhat.com>
Date: Wed, 18 Dec 2024 16:28:34 +0100
From: Eric Auger <eauger@...hat.com>
To: Anshuman Khandual <anshuman.khandual@....com>,
 linux-kernel@...r.kernel.org, kvmarm@...ts.linux.dev,
 linux-arm-kernel@...ts.infradead.org, maz@...nel.org
Cc: ryan.roberts@....com, Oliver Upton <oliver.upton@...ux.dev>,
 James Morse <james.morse@....com>, Suzuki K Poulose
 <suzuki.poulose@....com>, Catalin Marinas <catalin.marinas@....com>,
 Will Deacon <will@...nel.org>, Mark Brown <broonie@...nel.org>
Subject: Re: [PATCH V2 11/46] arm64/sysreg: Add register fields for PMSIDR_EL1



On 12/10/24 06:52, Anshuman Khandual wrote:
> This adds register fields for PMSIDR_EL1 as per the definitions based
> on DDI0601 2024-09.
> 
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: Will Deacon <will@...nel.org>
> Cc: Mark Brown <broonie@...nel.org>
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: linux-kernel@...r.kernel.org
> Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>
Reviewed-by: Eric Auger <eric.auger@...hat.com>

Eric
> ---
>  arch/arm64/tools/sysreg | 16 ++++++++++++++--
>  1 file changed, 14 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index be0091060350..a5e31e4c4474 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -2172,7 +2172,16 @@ Field	15:0	MINLAT
>  EndSysreg
>  
>  Sysreg	PMSIDR_EL1	3	0	9	9	7
> -Res0	63:25
> +Res0	63:33
> +Field	32	SME
> +UnsignedEnum	31:28	ALTCLK
> +	0b0000	NI
> +	0b0001	IMP
> +	0b1111	IMP_DEF
> +EndEnum
> +Field	27	FPF
> +Field	26	EFT
> +Field	25	CRR
>  Field	24	PBT
>  Field	23:20	FORMAT
>  Enum	19:16	COUNTSIZE
> @@ -2190,7 +2199,10 @@ Enum	11:8	INTERVAL
>  	0b0111	3072
>  	0b1000	4096
>  EndEnum
> -Res0	7
> +UnsignedEnum	7	FDS
> +	0b0	NI
> +	0b1	IMP
> +EndEnum
>  Field	6	FnE
>  Field	5	ERND
>  Field	4	LDS