lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20241218121437.1717-1-ravi.bangoria@amd.com>
Date: Wed, 18 Dec 2024 12:14:31 +0000
From: Ravi Bangoria <ravi.bangoria@....com>
To: <peterz@...radead.org>, <mingo@...hat.com>, <namhyung@...nel.org>
CC: <ravi.bangoria@....com>, <acme@...nel.org>, <eranian@...gle.com>,
	<jolsa@...nel.org>, <irogers@...gle.com>, <kan.liang@...ux.intel.com>,
	<bp@...en8.de>, <x86@...nel.org>, <linux-perf-users@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <santosh.shukla@....com>,
	<ananth.narayan@....com>, <sandipan.das@....com>
Subject: [PATCH v2 0/6] perf/amd/ibs: Add Zen5 support

IBS on Zen5:
- introduced Load Latency filtering capability.
- shows DTLB and page size information differently from prior generations.

Incorporate these changes into IBS kernel driver as well as perf tool.

Patches are prepared on tip/perf/core (02c56362a7d3).

Note: IBS sample period cleanup patches are pre-req for this.
      https://lore.kernel.org/r/20241210093449.1662-1-ravi.bangoria@amd.com

v1: https://lore.kernel.org/r/20241010050815.751-1-ravi.bangoria@amd.com
v1->v2:
 - There were some conflicts with Namhyung's IBS patches[1] which are now
   in the tip tree, so rebase the series on tip/perf/core (02c56362a7d3).
 - v1 covered only Load Latency support. But there are few other IBS
   enhancements in Zen5. So cover all of them in a single series.

[1]: https://lore.kernel.org/r/20241203180441.1634709-1-namhyung@kernel.org

Ravi Bangoria (6):
  perf/amd/ibs: Add support for OP Load Latency Filtering
  perf/amd/ibs: Update DTLB/PageSize decode logic
  perf amd ibs: Sync arch/x86/include/asm/amd-ibs.h header with the
    kernel
  perf amd ibs: Add Load Latency bits in raw dump
  perf amd ibs: Incorporate Zen5 DTLB and PageSize information
  perf mem/c2c amd: Add ldlat support

 arch/x86/events/amd/ibs.c                  | 116 +++++++++++++++++++--
 arch/x86/include/asm/amd-ibs.h             |   3 +-
 arch/x86/include/asm/perf_event.h          |   4 +
 tools/arch/x86/include/asm/amd-ibs.h       |   3 +-
 tools/perf/Documentation/perf-amd-ibs.txt  |   9 ++
 tools/perf/Documentation/perf-c2c.txt      |  10 +-
 tools/perf/Documentation/perf-mem.txt      |  12 ++-
 tools/perf/arch/x86/util/mem-events.c      |   6 ++
 tools/perf/arch/x86/util/mem-events.h      |   1 +
 tools/perf/arch/x86/util/pmu.c             |  20 +++-
 tools/perf/tests/shell/test_data_symbol.sh |  29 +++++-
 tools/perf/util/amd-sample-raw.c           |  77 +++++++++++---
 tools/perf/util/pmu.c                      |  11 ++
 tools/perf/util/pmu.h                      |   2 +
 14 files changed, 269 insertions(+), 34 deletions(-)

-- 
2.43.0


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ