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Message-Id: <20241218-a100-syscon-v2-2-dae60b9ce192@epochal.quest>
Date: Wed, 18 Dec 2024 09:01:19 -0400
From: Cody Eksal <masterr3c0rd@...chal.quest>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>, Maxime Ripard <mripard@...nel.org>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-sunxi@...ts.linux.dev, linux-kernel@...r.kernel.org,
Parthiban Nallathambi <parthiban@...umiz.com>,
Andre Przywara <andre.przywara@....com>,
Cody Eksal <masterr3c0rd@...chal.quest>
Subject: [PATCH v2 2/2] arm64: dts: allwinner: a100: Add syscon nodes
The Allwinner A100 has a system configuration block, denoted as SYS_CFG
in the user manual's memory map. It is undocumented in the manual, but
a glance at the vendor tree shows this block is similar to its
predecessors in the A64 and H6. The A100 also has 3 SRAM blocks: A1, A2,
and C. Add all of these to the SoC's device tree.
Reviewed-by: Parthiban Nallathambi <parthiban@...umiz.com>
Signed-off-by: Cody Eksal <masterr3c0rd@...chal.quest>
---
arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 33 ++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
index 29ac7716c7a5284ccf8af675db9c7d016785f0ff..a24adba201af29a3a117222c67da5d269629fa47 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
@@ -101,6 +101,39 @@ soc {
#size-cells = <1>;
ranges = <0 0 0 0x3fffffff>;
+ syscon: syscon@...0000 {
+ compatible = "allwinner,sun50i-a100-system-control",
+ "allwinner,sun50i-a64-system-control";
+ reg = <0x03000000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ sram_a1: sram@...00 {
+ compatible = "mmio-sram";
+ reg = <0x00020000 0x4000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x00020000 0x4000>;
+ };
+
+ sram_c: sram@...00 {
+ compatible = "mmio-sram";
+ reg = <0x024000 0x21000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x024000 0x21000>;
+ };
+
+ sram_a2: sram@...000 {
+ compatible = "mmio-sram";
+ reg = <0x0100000 0x14000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x0100000 0x14000>;
+ };
+ };
+
ccu: clock@...1000 {
compatible = "allwinner,sun50i-a100-ccu";
reg = <0x03001000 0x1000>;
--
2.47.1
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