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Message-Id: <20241219-topic-gmu_fw_ver-v1-1-d403a70052d8@oss.qualcomm.com>
Date: Thu, 19 Dec 2024 23:36:55 +0100
From: Konrad Dybcio <konradybcio@...nel.org>
To: Rob Clark <robdclark@...il.com>, Sean Paul <sean@...rly.run>, 
 Konrad Dybcio <konradybcio@...nel.org>, 
 Abhinav Kumar <quic_abhinavk@...cinc.com>, 
 Dmitry Baryshkov <dmitry.baryshkov@...aro.org>, 
 David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>
Cc: Marijn Suijten <marijn.suijten@...ainline.org>, 
 linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org, 
 freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org, 
 Akhil P Oommen <quic_akhilpo@...cinc.com>, 
 Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: [PATCH 1/2] drm/msm: registers: Add GMU FW version register

From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>

Add a register that contains the GMU core firmware version on non-
legacy (non-sdm845-family) SoCs.

The name is guesstimated based on what it does downstream, but it'll
do.

Signed-off-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
---
 drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml b/drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml
index 6531749d30f4e4e57ca4f7b43a28b7829504a9f3..3d2cc339b8f19c8d24b2c9144569b2364afc5ebc 100644
--- a/drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml
+++ b/drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml
@@ -52,6 +52,11 @@ xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
 	<reg32 offset="0x23fd" name="GMU_DCVS_PERF_SETTING"/>
 	<reg32 offset="0x23fe" name="GMU_DCVS_BW_SETTING"/>
 	<reg32 offset="0x23ff" name="GMU_DCVS_RETURN"/>
+	<reg32 offset="0x2bf8" name="GMU_CORE_FW_VERSION">
+		<bitfield name="MAJOR" low="28" high="31"/>
+		<bitfield name="MINOR" low="16" high="27"/>
+		<bitfield name="STEP" low="0" high="15"/>
+	</reg32>
 	<reg32 offset="0x4c00" name="GMU_ICACHE_CONFIG"/>
 	<reg32 offset="0x4c01" name="GMU_DCACHE_CONFIG"/>
 	<reg32 offset="0x4c0f" name="GMU_SYS_BUS_CONFIG"/>

-- 
2.47.1


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