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Message-Id: <20241219011159.3357530-3-zhangqing@rock-chips.com>
Date: Thu, 19 Dec 2024 09:11:59 +0800
From: Elaine Zhang <zhangqing@...k-chips.com>
To: zhangqing@...k-chips.com,
mkl@...gutronix.de,
kernel@...gutronix.de,
mailhol.vincent@...adoo.fr,
heiko@...ech.de,
cl@...k-chips.com,
kever.yang@...k-chips.com
Cc: linux-can@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: [PATCH v2 2/2] arm64: dts: rockchip: rk3576: add can dts nodes
Signed-off-by: Elaine Zhang <zhangqing@...k-chips.com>
---
arch/arm64/boot/dts/rockchip/rk3576.dtsi | 26 ++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
index 436232ffe4d1..eefae2b5e6e4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
@@ -1195,6 +1195,32 @@ dmac2: dma-controller@...d0000 {
#dma-cells = <1>;
};
+ can0: can@...00000 {
+ compatible = "rockchip,rk3576-canfd";
+ reg = <0x0 0x2ac00000 0x0 0x1000>;
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru CLK_CAN0>, <&cru HCLK_CAN0>;
+ clock-names = "baudclk", "apb_pclk";
+ resets = <&cru SRST_CAN0>, <&cru SRST_H_CAN0>;
+ reset-names = "can", "can-apb";
+ dmas = <&dmac0 20>;
+ dma-names = "rx";
+ status = "disabled";
+ };
+
+ can1: can@...10000 {
+ compatible = "rockchip,rk3576-canfd";
+ reg = <0x0 0x2ac10000 0x0 0x1000>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru CLK_CAN1>, <&cru HCLK_CAN1>;
+ clock-names = "baudclk", "apb_pclk";
+ resets = <&cru SRST_CAN1>, <&cru SRST_H_CAN1>;
+ reset-names = "can", "can-apb";
+ dmas = <&dmac1 21>;
+ dma-names = "rx";
+ status = "disabled";
+ };
+
i2c1: i2c@...40000 {
compatible = "rockchip,rk3576-i2c", "rockchip,rk3399-i2c";
reg = <0x0 0x2ac40000 0x0 0x1000>;
--
2.34.1
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