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Message-ID: <20241218171916.24a7e24f@kernel.org>
Date: Wed, 18 Dec 2024 17:19:16 -0800
From: Jakub Kicinski <kuba@...nel.org>
To: Furong Xu <0x1207@...il.com>
Cc: netdev@...r.kernel.org, linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Alexandre Torgue <alexandre.torgue@...s.st.com>, Jose Abreu
<joabreu@...opsys.com>, Andrew Lunn <andrew+netdev@...n.ch>, "David S.
Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, Paolo
Abeni <pabeni@...hat.com>, Maxime Coquelin <mcoquelin.stm32@...il.com>,
xfr@...look.com
Subject: Re: [PATCH net-next v1] net: stmmac: TSO: Simplify the code flow of
DMA descriptor allocations
On Fri, 13 Dec 2024 11:00:06 +0800 Furong Xu wrote:
> - if (priv->dma_cap.addr64 <= 32)
> - desc->des0 = cpu_to_le32(curr_addr);
> - else
> - stmmac_set_desc_addr(priv, desc, curr_addr);
> -
> + stmmac_set_desc_addr(priv, desc, curr_addr);
I can't figure out if this is correct or not in a reasonable amount of
time. dwmac4 and dwxgmac2 looks pretty obviously okay. But there are
also ndesc and enh, which don't seem to map to platform in an obvious
way to an outside reviewer.
Please provide more context/guidance in the commit message, otherwise
this looks like a high risk refactoring for a driver this poorly
designed.
--
pw-bot: cr
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