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Message-ID: <CABymUCN_17o7xpvv1DjfAe+o07-Ns85G+d4W-8bmz=t9hWS6NA@mail.gmail.com>
Date: Thu, 19 Dec 2024 15:53:39 +0800
From: Jun Nie <jun.nie@...aro.org>
To: Rob Clark <robdclark@...il.com>, Abhinav Kumar <quic_abhinavk@...cinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>, Sean Paul <sean@...rly.run>,
Marijn Suijten <marijn.suijten@...ainline.org>, David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>
Cc: linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: [PATCH v3 00/15] drm/msm/dpu: Support quad pipe with dual-DSI
Jun Nie <jun.nie@...aro.org> 于2024年12月19日周四 15:49写道:
>
> To: Rob Clark <robdclark@...il.com>
> To: Abhinav Kumar <quic_abhinavk@...cinc.com>
> To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> To: Sean Paul <sean@...rly.run>
> To: Marijn Suijten <marijn.suijten@...ainline.org>
> To: David Airlie <airlied@...il.com>
> To: Simona Vetter <simona@...ll.ch>
> Cc: linux-arm-msm@...r.kernel.org
> Cc: dri-devel@...ts.freedesktop.org
> Cc: freedreno@...ts.freedesktop.org
> Cc: linux-kernel@...r.kernel.org
> drm/msm/dpu: Support quad pipe with dual-DSI
>
> 2 or more SSPPs and dual-DSI interface are need for super wide DSI panel.
> And 4 DSC are preferred for power optimal in this case. This patch set
> extend number of pipes to 4 and revise related mixer blending logic
> to support quad pipe. All these changes depends on the virtual plane
> feature to split a super wide drm plane horizontally into 2 or more sub
> clip. Thus DMA of multiple SSPPs can share the effort of fetching the
> whole drm plane.
>
> The first pipe pair co-work with the first mixer pair to cover the left
> half of screen and 2nd pair of pipes and mixers are for the right half
> of screen. If a plane is only for the right half of screen, only one
> or two of pipes in the 2nd pipe pair are valid, and no SSPP or mixer is
> assinged for invalid pipe.
>
> For those panel that does not require quad-pipe, only 1 or 2 pipes in
> the 1st pipe pair will be used. There is no concept of right half of
> screen.
>
> For legacy non virtual plane mode, the first 1 or 2 pipes are used for
> the single SSPP and its multi-rect mode.
>
> This patch set depends on virtual plane patch set v7:
> https://lore.kernel.org/all/20241130-dpu-virtual-wide-v7-0-991053fcf63c@linaro.org/
>
> Changes in v3:
> - Split change in trace into a separate patch.
> - Rebase to latest msm-next branch.
> - Reorder patch sequence to make sure valid flag is set in earlier patch
> - Rectify rewrite patch to move logic change into other patch
> - Polish commit messages and code comments.
> - Link to v2: https://lore.kernel.org/dri-devel/20241009-sm8650-v6-11-hmd-pocf-mdss-quad-upstream-21-v2-0-76d4f5d413bf@linaro.org/
>
> Changes in v2:
> - Revise the patch sequence with changing to 2 pipes topology first. Then
> prepare for quad-pipe setup, then enable quad-pipe at last.
> - Split DSI patches into other patch set.
> - Link to v1: https://lore.kernel.org/all/20240829-sm8650-v6-11-hmd-pocf-mdss-quad-upstream-8-v1-0-bdb05b4b5a2e@linaro.org/
>
> Signed-off-by: Jun Nie <jun.nie@...aro.org>
> ---
> Jun Nie (15):
> drm/msm/dpu: Do not fix number of DSC
> drm/msm/dpu: configure DSC per number in use
> drm/msm/dpu: polish log for resource allocation
> drm/msm/dpu: decide right side per last bit
> drm/msm/dpu: fix mixer number counter on allocation
> drm/msm/dpu: switch RM to use crtc_id rather than enc_id for allocation
> drm/msm/dpu: bind correct pingpong for quad pipe
> drm/msm/dpu: handle pipes as array
> drm/msm/dpu: split PIPES_PER_STAGE definition per plane and mixer
> drm/msm/dpu: Add pipe as trace argument
> drm/msm/dpu: blend pipes per mixer pairs config
> drm/msm/dpu: support plane splitting in quad-pipe case
> drm/msm/dpu: Support quad-pipe in SSPP checking
> drm/msm/dpu: support SSPP assignment for quad-pipe case
> drm/msm/dpu: Enable quad-pipe for DSC and dual-DSI case
>
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 77 +++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 12 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 74 +++--
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 3 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 +
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 2 +
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 2 +
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 12 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 403 ++++++++++++++---------
> drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h | 12 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 219 ++++++------
> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 32 +-
> drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 10 +-
> 13 files changed, 511 insertions(+), 348 deletions(-)
> ---
> base-commit: a9b9ea7b45d661fff0f3fd2937703a536f528cd2
> change-id: 20241219-sm8650-v6-13-hmd-deckard-mdss-quad-upstream-32-2bdbc22f5131
>
> Best regards,
> --
> Jun Nie <jun.nie@...aro.org>
>
Sorry to have no title for cover due to miss handling the b4 tool . So
reply to this thread with the title in it.
- Jun
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