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Message-ID: <999ad91d-9b61-b939-a043-4ab3f07c72a1@163.com>
Date: Thu, 19 Dec 2024 03:49:33 -0500
From: Hans Zhang <18255117159@....com>
To: Siddharth Vadapalli <s-vadapalli@...com>
Cc: lpieralisi@...nel.org, kw@...ux.com, manivannan.sadhasivam@...aro.org,
 robh@...nel.org, bhelgaas@...gle.com, thomas.richard@...tlin.com,
 linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org, rockswang7@...il.com
Subject: Re: [PATCH] PCI: cadence: Fixed cdns_pcie_host_link_setup return
 value.


On 12/19/24 03:33, Siddharth Vadapalli wrote:
> On Thu, Dec 19, 2024 at 03:14:52AM -0500, Hans Zhang wrote:
>> If the PCIe link never came up, the enumeration process
>> should not be run.
> The link could come up at a later point in time. Please refer to the
> implementation of:
> dw_pcie_host_init() in drivers/pci/controller/dwc/pcie-designware-host.c
> wherein we have the following:
> 	/* Ignore errors, the link may come up later */
> 	dw_pcie_wait_for_link(pci);
>
> It seems to me that the logic behind ignoring the absence of the link
> within cdns_pcie_host_link_setup() instead of erroring out, is similar to
> that of dw_pcie_wait_for_link().
>
> Regards,
> Siddharth.
>
>
> If a PCIe port is not connected to a device. The PCIe link does not
> go up. The current code returns success whether the device is connected
> or not. Cadence IP's ECAM requires an LTSSM at L0 to access the RC's
> config space registers. Otherwise the enumeration process will hang.
>
> Regards,
> Hans


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