[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20241220195220.1e1e1d6f@jic23-huawei>
Date: Fri, 20 Dec 2024 19:52:20 +0000
From: Jonathan Cameron <jic23@...nel.org>
To: Antoniu Miclaus <antoniu.miclaus@...log.com>
Cc: <robh@...nel.org>, <conor+dt@...nel.org>, <linux-iio@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-pwm@...r.kernel.org>
Subject: Re: [PATCH v3 1/3] dt-bindings: iio: adf4371: add refin mode
On Fri, 20 Dec 2024 11:56:13 +0200
Antoniu Miclaus <antoniu.miclaus@...log.com> wrote:
> Add support for selecting between single-ended and differential
> reference input.
>
> By default the single-ended input is enabled.
>
> Input frequency boundaries are change based on the mode selected
> (single-ended/differential).
>
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@...log.com>
> ---
> changes in v3:
> - add option to select between refin-se and refin-diff
> .../devicetree/bindings/iio/frequency/adf4371.yaml | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml
> index 1cb2adaf66f9..f927d3af9f43 100644
> --- a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml
> +++ b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml
> @@ -40,6 +40,13 @@ properties:
> output stage will shut down until the ADF4371/ADF4372 achieves lock as
> measured by the digital lock detect circuitry.
>
> + adi,refin-mode:
> + description:
> + Choose between single-ended or differential reference input.
> + refin-se - Single-Ended Reference Input
> + refin-diff - Differential Reference Input
> + enum: [refin-se, refin-diff]
I think I've failed convey what I was suggesting in previous reviews.
Until now the binding has
clocks:
description:
Definition of the external clock (see clock/clock-bindings.txt)
maxItems: 1
clock-names:
description:
Must be "clkin"
maxItems: 1
Now you have a situation not dissimilar to what we do for clock where they may
be connected to either a clock source or a crystal. There we provide
two clock names and depending on which one is set, configure the device
appropriately.
Here we have clkin. That will be whatever the default we have so far.
Now add a possible name of
clkin-se or clkin-diff depending on which one we are not considering the
default. I think the default is single ended, so make our two possible clock
names
clkin and clkin-diff with description explaining that clkin is a single ended
clocks signal.
Jonathan
> +
> required:
> - compatible
> - reg
Powered by blists - more mailing lists