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Message-ID: <4f7a25de-f1b5-44e8-b858-be4fac122c58@oss.nxp.com>
Date: Fri, 20 Dec 2024 10:21:07 +0200
From: Ciprian Marian Costea <ciprianmarian.costea@....nxp.com>
To: Frank Li <Frank.li@....com>
Cc: Chester Lin <chester62515@...il.com>, Matthias Brugger
<mbrugger@...e.com>, Ghennadi Procopciuc <ghennadi.procopciuc@....nxp.com>,
Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Pengutronix Kernel Team <kernel@...gutronix.de>,
linux-arm-kernel@...ts.infradead.org, imx@...ts.linux.dev,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
NXP S32 Linux <s32@....com>, Christophe Lizzi <clizzi@...hat.com>,
Alberto Ruiz <aruizrui@...hat.com>, Enric Balletbo <eballetb@...hat.com>
Subject: Re: [PATCH v3 1/4] arm64: dts: s32g: add 'I2C' common board support
On 12/19/2024 7:17 PM, Frank Li wrote:
> On Thu, Dec 19, 2024 at 03:10:26PM +0200, Ciprian Costea wrote:
>> From: Ciprian Marian Costea <ciprianmarian.costea@....nxp.com>
>>
>> On both 'S32G2' and 'S32G3' SoCs there are five i2c controllers available
>> (i2c0-i2c4). Specific S32G2/S32G3 based board 'i2c' dts device support
>> will be added in further commits.
>>
>> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@....nxp.com>
>> ---
>> arch/arm64/boot/dts/freescale/s32g2.dtsi | 45 +++++++++++++++++++++
>> arch/arm64/boot/dts/freescale/s32g3.dtsi | 50 ++++++++++++++++++++++++
>> 2 files changed, 95 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
>> index 7be430b78c83..0e6c847ab0c3 100644
>> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
>> @@ -333,6 +333,33 @@ uart1: serial@...cc000 {
>> status = "disabled";
>> };
>>
>> + i2c0: i2c@...e4000 {
>> + compatible = "nxp,s32g2-i2c";
>> + reg = <0x401e4000 0x1000>;
>
> Need add common part #address-cell and #size-cell, which all are the same
> for all I2C.
>
> Frank
>
Hello Frank,
Ok, I will update accordingly in V4.
Best Regards,
Ciprian
>> + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> + i2c1: i2c@...e8000 {
>> + compatible = "nxp,s32g2-i2c";
>> + reg = <0x401e8000 0x1000>;
>> + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> + i2c2: i2c@...ec000 {
>> + compatible = "nxp,s32g2-i2c";
>> + reg = <0x401ec000 0x1000>;
>> + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> uart2: serial@...bc000 {
>> compatible = "nxp,s32g2-linflexuart",
>> "fsl,s32v234-linflexuart";
>> @@ -341,6 +368,24 @@ uart2: serial@...bc000 {
>> status = "disabled";
>> };
>>
>> + i2c3: i2c@...d8000 {
>> + compatible = "nxp,s32g2-i2c";
>> + reg = <0x402d8000 0x1000>;
>> + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> + i2c4: i2c@...dc000 {
>> + compatible = "nxp,s32g2-i2c";
>> + reg = <0x402dc000 0x1000>;
>> + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> usdhc0: mmc@...f0000 {
>> compatible = "nxp,s32g2-usdhc";
>> reg = <0x402f0000 0x1000>;
>> diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
>> index 6c572ffe37ca..666e4029e588 100644
>> --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
>> @@ -390,6 +390,36 @@ uart1: serial@...cc000 {
>> status = "disabled";
>> };
>>
>> + i2c0: i2c@...e4000 {
>> + compatible = "nxp,s32g3-i2c",
>> + "nxp,s32g2-i2c";
>> + reg = <0x401e4000 0x1000>;
>> + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> + i2c1: i2c@...e8000 {
>> + compatible = "nxp,s32g3-i2c",
>> + "nxp,s32g2-i2c";
>> + reg = <0x401e8000 0x1000>;
>> + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> + i2c2: i2c@...ec000 {
>> + compatible = "nxp,s32g3-i2c",
>> + "nxp,s32g2-i2c";
>> + reg = <0x401ec000 0x1000>;
>> + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> uart2: serial@...bc000 {
>> compatible = "nxp,s32g3-linflexuart",
>> "fsl,s32v234-linflexuart";
>> @@ -398,6 +428,26 @@ uart2: serial@...bc000 {
>> status = "disabled";
>> };
>>
>> + i2c3: i2c@...d8000 {
>> + compatible = "nxp,s32g3-i2c",
>> + "nxp,s32g2-i2c";
>> + reg = <0x402d8000 0x1000>;
>> + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> + i2c4: i2c@...dc000 {
>> + compatible = "nxp,s32g3-i2c",
>> + "nxp,s32g2-i2c";
>> + reg = <0x402dc000 0x1000>;
>> + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> usdhc0: mmc@...f0000 {
>> compatible = "nxp,s32g3-usdhc",
>> "nxp,s32g2-usdhc";
>> --
>> 2.45.2
>>
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