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Message-ID: <Z2VJIh2+Z40bZi1e@e129823.arm.com>
Date: Fri, 20 Dec 2024 10:38:26 +0000
From: Yeoreum Yun <yeoreum.yun@....com>
To: Mike Leach <mike.leach@...aro.org>
Cc: suzuki.poulose@....com, james.clark@...aro.org,
alexander.shishkin@...ux.intel.com, bigeasy@...utronix.de,
clrkwllms@...nel.org, rostedt@...dmis.org,
coresight@...ts.linaro.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-rt-devel@...ts.linux.dev
Subject: Re: [PATCH v3 0/9] coresight: change some driver' spinlock type to
raw_spinlock_t
Hi Mike.
> Notably missing is the same changes for the etm3x driver. The ETMv3.x
> and PTM1.x are supported by this driver, and these trace source
> variants are also supported in perf in the cs_etm.c code.
But I wonder etmv3 needs to change. Because its spinlock is used only
via sysfs enable/disable path.
So, I think it doesn't need to change the lock type.
> STM is also missing, though this is not directly enabled via perf -
> but could perhaps run concurrently as it can be a target output for
> ftrace.
Actually, I couldn't find out the path where
the STM's lock could be grabbed under other raw_spin_lock (including csdev)
If you don't mind would you let me the code path please?
Thanks
> --
> Mike Leach
> Principal Engineer, ARM Ltd.
> Manchester Design Centre. UK
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