[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <202412211301.bQO6vXpo-lkp@intel.com>
Date: Sat, 21 Dec 2024 14:13:27 +0800
From: kernel test robot <lkp@...el.com>
To: Ziyue Zhang <quic_ziyuzhan@...cinc.com>, vkoul@...nel.org,
kishon@...nel.org, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, dmitry.baryshkov@...aro.org,
neil.armstrong@...aro.org, abel.vesa@...aro.org,
manivannan.sadhasivam@...aro.org, lpieralisi@...nel.org,
kw@...ux.com, bhelgaas@...gle.com, andersson@...nel.org,
konradybcio@...nel.org
Cc: oe-kbuild-all@...ts.linux.dev, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
quic_qianyu@...cinc.com, quic_krichai@...cinc.com,
quic_vbadigan@...cinc.com, Ziyue Zhang <quic_ziyuzhan@...cinc.com>
Subject: Re: [PATCH v3 2/8] phy: qcom-qmp-pcie: add dual lane PHY support for
QCS8300
Hi Ziyue,
kernel test robot noticed the following build errors:
[auto build test ERROR on 4176cf5c5651c33769de83bb61b0287f4ec7719f]
url: https://github.com/intel-lab-lkp/linux/commits/Ziyue-Zhang/dt-bindings-phy-qcom-sc8280xp-qmp-pcie-phy-Document-the-QCS8300-QMP-PCIe-PHY-Gen4-x2/20241220-135722
base: 4176cf5c5651c33769de83bb61b0287f4ec7719f
patch link: https://lore.kernel.org/r/20241220055239.2744024-3-quic_ziyuzhan%40quicinc.com
patch subject: [PATCH v3 2/8] phy: qcom-qmp-pcie: add dual lane PHY support for QCS8300
config: arm64-randconfig-004-20241221 (https://download.01.org/0day-ci/archive/20241221/202412211301.bQO6vXpo-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241221/202412211301.bQO6vXpo-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202412211301.bQO6vXpo-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/phy/qualcomm/phy-qcom-qmp-pcie.c:3419:35: error: 'pciephy_v5_20_regs_layout' undeclared here (not in a function); did you mean 'pciephy_v5_regs_layout'?
3419 | .regs = pciephy_v5_20_regs_layout,
| ^~~~~~~~~~~~~~~~~~~~~~~~~
| pciephy_v5_regs_layout
vim +3419 drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
3390
3391 static const struct qmp_phy_cfg qcs8300_qmp_gen4x2_pciephy_cfg = {
3392 .lanes = 2,
3393 .offsets = &qmp_pcie_offsets_v5_20,
3394
3395 .tbls = {
3396 .serdes = sa8775p_qmp_gen4x2_pcie_serdes_alt_tbl,
3397 .serdes_num = ARRAY_SIZE(sa8775p_qmp_gen4x2_pcie_serdes_alt_tbl),
3398 .tx = sa8775p_qmp_gen4_pcie_tx_tbl,
3399 .tx_num = ARRAY_SIZE(sa8775p_qmp_gen4_pcie_tx_tbl),
3400 .rx = qcs8300_qmp_gen4x2_pcie_rx_alt_tbl,
3401 .rx_num = ARRAY_SIZE(qcs8300_qmp_gen4x2_pcie_rx_alt_tbl),
3402 .pcs = sa8775p_qmp_gen4x2_pcie_pcs_alt_tbl,
3403 .pcs_num = ARRAY_SIZE(sa8775p_qmp_gen4x2_pcie_pcs_alt_tbl),
3404 .pcs_misc = sa8775p_qmp_gen4_pcie_pcs_misc_tbl,
3405 .pcs_misc_num = ARRAY_SIZE(sa8775p_qmp_gen4_pcie_pcs_misc_tbl),
3406 },
3407
3408 .tbls_rc = &(const struct qmp_phy_cfg_tbls) {
3409 .serdes = sa8775p_qmp_gen4x2_pcie_rc_serdes_alt_tbl,
3410 .serdes_num = ARRAY_SIZE(sa8775p_qmp_gen4x2_pcie_rc_serdes_alt_tbl),
3411 .pcs_misc = sa8775p_qmp_gen4_pcie_rc_pcs_misc_tbl,
3412 .pcs_misc_num = ARRAY_SIZE(sa8775p_qmp_gen4_pcie_rc_pcs_misc_tbl),
3413 },
3414
3415 .reset_list = sdm845_pciephy_reset_l,
3416 .num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l),
3417 .vreg_list = qmp_phy_vreg_l,
3418 .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
> 3419 .regs = pciephy_v5_20_regs_layout,
3420
3421 .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL,
3422 .phy_status = PHYSTATUS_4_20,
3423 };
3424
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
Powered by blists - more mailing lists