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Message-ID: <uo4zvw4sl6uxsj2ewvoue7l3obugivq5z74ukwnd4sj3ndtwhu@hxxque3r4nvb>
Date: Sun, 22 Dec 2024 09:44:10 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Tudor Ambarus <tudor.ambarus@...aro.org>
Cc: Jassi Brar <jassisinghbrar@...il.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Alim Akhtar <alim.akhtar@...sung.com>, linux-kernel@...r.kernel.org, linux-samsung-soc@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, andre.draszik@...aro.org,
peter.griffin@...aro.org, kernel-team@...roid.com, willmcvicker@...gle.com,
daniel.lezcano@...aro.org, vincent.guittot@...aro.org, ulf.hansson@...aro.org,
arnd@...db.de
Subject: Re: [PATCH v6 2/5] dt-bindings: mailbox: add google,gs101-mbox
On Fri, Dec 20, 2024 at 01:49:57PM +0000, Tudor Ambarus wrote:
> Add bindings for the Samsung Exynos Mailbox Controller.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@...aro.org>
> ---
> .../bindings/mailbox/google,gs101-mbox.yaml | 70 ++++++++++++++++++++++
> include/dt-bindings/mailbox/google,gs101.h | 14 +++++
Drop the header, not used.
> 2 files changed, 84 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mailbox/google,gs101-mbox.yaml b/Documentation/devicetree/bindings/mailbox/google,gs101-mbox.yaml
> new file mode 100644
> index 000000000000..a1fbc3b2b9de
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mailbox/google,gs101-mbox.yaml
> @@ -0,0 +1,70 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright 2024 Linaro Ltd.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mailbox/google,gs101-mbox.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung Exynos Mailbox Controller
> +
> +maintainers:
> + - Tudor Ambarus <tudor.ambarus@...aro.org>
> +
> +description: |
Drop |
> + The Samsung Exynos mailbox controller, used on Google GS101 SoC, has 16 flag
> + bits for hardware interrupt generation and a shared register for passing
> + mailbox messages. When the controller is used by the ACPM protocol the shared
> + register is ignored and the mailbox controller acts as a doorbell.
> + The controller just raises the interrupt to the firmware after the
> + ACPM protocol has written the message to SRAM.
> +
> +properties:
> + compatible:
> + const: google,gs101-mbox
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + items:
> + - const: pclk
> +
> + interrupts:
> + description: IRQ line for the RX mailbox.
> + maxItems: 1
> +
> + '#mbox-cells':
> + const: 0
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - interrupts
> + - '#mbox-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + # Doorbell mode.
Drop comment, not applicable now, I think.
Best regards,
Krzysztof
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