linux-kernel - Re: [PATCH v2 9/9] i2c: riic: Implement bus recovery

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Message-ID: <Z2gJtlb5Sc9esEba@ninjato>
Date: Sun, 22 Dec 2024 13:44:38 +0100
From: Wolfram Sang <wsa+renesas@...g-engineering.com>
To: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
Cc: Chris Brandt <chris.brandt@...esas.com>,
	Andi Shyti <andi.shyti@...nel.org>,
	Philipp Zabel <p.zabel@...gutronix.de>,
	Wolfram Sang <wsa@...nel.org>,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	linux-renesas-soc@...r.kernel.org, linux-i2c@...r.kernel.org,
	linux-kernel@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>,
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v2 9/9] i2c: riic: Implement bus recovery


> On the RZ/G2L and RZ/G3S there is a restriction for forcing the SDA/SCL states:
> 
> ● Write:
> 0: Changes the RIICnSCL/RIICnSDA pin output to a low level.
> 1: Changes the RIICnSCL/RIICnSDA pin in a high-impedance state.
> (High level output is achieved through an external pull-up resistor.)
> 
> So using the generic algorithm may be platform dependent as it would
> only work on platforms which have external pull-up resistor on SDA/SCL
> pins. So to overcome this and make recovery possible on the platforms
> I choose the RIIC feature to output clock cycles as required.

I would be super-surprised if this is really a restriction and not a
very precise documentation. In other words, I am quite sure that there
is no difference between the bit forcing SCL high (via high-impedance)
and the internal RIIC handling when it needs SCL high. Most I2C busses
are open-drain anyhow.

Or is it confirmed by hardware engineers that RIIC is able to support
push/pull-busses but only this bit cannot?


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