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Message-ID: <47c9a897-cbe3-1423-b851-cf1efb11a5dc@quicinc.com>
Date: Mon, 23 Dec 2024 20:05:25 +0530
From: Krishna Chaitanya Chundru <quic_krichai@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
        Krishna Chaitanya Chundru
	<krishna.chundru@....qualcomm.com>,
        Rob Herring <robh@...nel.org>,
        "Krzysztof
 Kozlowski" <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        "Bjorn
 Helgaas" <bhelgaas@...gle.com>,
        Jingoo Han <jingoohan1@...il.com>,
        "Manivannan Sadhasivam" <manivannan.sadhasivam@...aro.org>,
        Lorenzo Pieralisi
	<lpieralisi@...nel.org>,
        Krzysztof WilczyƄski <kw@...ux.com>
CC: <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-pci@...r.kernel.org>,
        <quic_mrana@...cinc.com>, <quic_vbadigan@...cinc.com>,
        Bjorn Andersson
	<andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>
Subject: Re: [PATCH v3 1/4] arm64: dts: qcom: x1e80100: Add PCIe lane
 equalization preset properties



On 12/23/2024 5:06 PM, Konrad Dybcio wrote:
> On 23.12.2024 7:51 AM, Krishna Chaitanya Chundru wrote:
>> Add PCIe lane equalization preset properties for 8 GT/s and 16 GT/s data
>> rates used in lane equalization procedure.
>>
>> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
>> ---
> 
> Does this also apply to PCIe3?
> 
> Konrad
>It will be applicable to PCIe3 also, I will update this in next patch

- Krishna Chaitanya.


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