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Message-ID: <20241223025751.3268975-3-riel@surriel.com> Date: Sun, 22 Dec 2024 21:55:08 -0500 From: Rik van Riel <riel@...riel.com> To: x86@...nel.org Cc: linux-kernel@...r.kernel.org, kernel-team@...a.com, dave.hansen@...ux.intel.com, luto@...nel.org, peterz@...radead.org, tglx@...utronix.de, mingo@...hat.com, bp@...en8.de, hpa@...or.com, akpm@...ux-foundation.org, linux-mm@...ck.org, Rik van Riel <riel@...riel.com> Subject: [PATCH 02/11] x86/mm: add X86_FEATURE_INVLPGB definition. Add the INVPLGB CPUID definition, allowing the kernel to recognize whether the CPU supports the INVLPGB instruction. Signed-off-by: Rik van Riel <riel@...riel.com> --- arch/x86/include/asm/cpufeatures.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 17b6590748c0..b7209d6c3a5f 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -338,6 +338,7 @@ #define X86_FEATURE_CLZERO (13*32+ 0) /* "clzero" CLZERO instruction */ #define X86_FEATURE_IRPERF (13*32+ 1) /* "irperf" Instructions Retired Count */ #define X86_FEATURE_XSAVEERPTR (13*32+ 2) /* "xsaveerptr" Always save/restore FP error pointers */ +#define X86_FEATURE_INVLPGB (13*32+ 3) /* "invlpgb" INVLPGB instruction */ #define X86_FEATURE_RDPRU (13*32+ 4) /* "rdpru" Read processor register at user level */ #define X86_FEATURE_WBNOINVD (13*32+ 9) /* "wbnoinvd" WBNOINVD instruction */ #define X86_FEATURE_AMD_IBPB (13*32+12) /* Indirect Branch Prediction Barrier */ -- 2.47.1
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