[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Z2nj8O12hnilYjjf@yury-ThinkPad>
Date: Mon, 23 Dec 2024 14:28:00 -0800
From: Yury Norov <yury.norov@...il.com>
To: Andrea Righi <arighi@...dia.com>
Cc: Tejun Heo <tj@...nel.org>, David Vernet <void@...ifault.com>,
Changwoo Min <changwoo@...lia.com>, Ingo Molnar <mingo@...hat.com>,
Peter Zijlstra <peterz@...radead.org>,
Juri Lelli <juri.lelli@...hat.com>,
Vincent Guittot <vincent.guittot@...aro.org>,
Dietmar Eggemann <dietmar.eggemann@....com>,
Steven Rostedt <rostedt@...dmis.org>,
Ben Segall <bsegall@...gle.com>, Mel Gorman <mgorman@...e.de>,
Valentin Schneider <vschneid@...hat.com>, bpf@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 05/10] sched_ext: idle: clarify comments
On Fri, Dec 20, 2024 at 04:11:37PM +0100, Andrea Righi wrote:
> Add a comments to clarify about the usage of cpumask_intersects().
>
> Moreover, update scx_select_cpu_dfl() description clarifying that the
> final step of the idle selection logic involves searching for any idle
> CPU in the system that the task can use.
>
> Signed-off-by: Andrea Righi <arighi@...dia.com>
Reviewed-by: Yury Norov <yury.norov@...il.com>
> ---
> kernel/sched/ext_idle.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/kernel/sched/ext_idle.c b/kernel/sched/ext_idle.c
> index dedd39febc88..4952e2793304 100644
> --- a/kernel/sched/ext_idle.c
> +++ b/kernel/sched/ext_idle.c
> @@ -52,6 +52,10 @@ static bool test_and_clear_cpu_idle(int cpu)
> * scx_pick_idle_cpu() can get caught in an infinite loop as
> * @cpu is never cleared from idle_masks.smt. Ensure that @cpu
> * is eventually cleared.
> + *
> + * NOTE: Use cpumask_intersects() and cpumask_test_cpu() to
> + * reduce memory writes, which may help alleviate cache
> + * coherence pressure.
> */
> if (cpumask_intersects(smt, idle_masks.smt))
> cpumask_andnot(idle_masks.smt, idle_masks.smt, smt);
> @@ -280,6 +284,8 @@ static void update_selcpu_topology(void)
> * 4. Pick a CPU within the same NUMA node, if enabled:
> * - choose a CPU from the same NUMA node to reduce memory access latency.
> *
> + * 5. Pick any idle CPU usable by the task.
> + *
> * Step 3 and 4 are performed only if the system has, respectively, multiple
> * LLC domains / multiple NUMA nodes (see scx_selcpu_topo_llc and
> * scx_selcpu_topo_numa).
> --
> 2.47.1
Powered by blists - more mailing lists