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Message-Id: <20241224-winbond-6-11-rc1-quad-support-v2-0-ad218dbc406f@bootlin.com>
Date: Tue, 24 Dec 2024 18:05:45 +0100
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Mark Brown <broonie@...nel.org>, Sanjay R Mehta <sanju.mehta@....com>,
Serge Semin <fancer.lancer@...il.com>, Han Xu <han.xu@....com>,
Conor Dooley <conor.dooley@...rochip.com>,
Daire McNamara <daire.mcnamara@...rochip.com>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Haibo Chen <haibo.chen@....com>, Yogesh Gaur <yogeshgaur.83@...il.com>,
Heiko Stuebner <heiko@...ech.de>, Michal Simek <michal.simek@....com>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>, Vignesh Raghavendra <vigneshr@...com>,
Jacky Huang <ychuang3@...oton.com>, Shan-Chun Hung <schung@...oton.com>,
Chin-Ting Kuo <chin-ting_kuo@...eedtech.com>,
Cédric Le Goater <clg@...d.org>,
Joel Stanley <joel@....id.au>, Andrew Jeffery <andrew@...econstruct.com.au>,
Avi Fishman <avifishman70@...il.com>, Tomer Maimon <tmaimon77@...il.com>,
Tali Perry <tali.perry1@...il.com>, Patrick Venture <venture@...gle.com>,
Nancy Yuen <yuenn@...gle.com>, Benjamin Fair <benjaminfair@...gle.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Raju Rangoju <Raju.Rangoju@....com>
Cc: Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Steam Lin <stlin2@...bond.com>, linux-spi@...r.kernel.org,
linux-kernel@...r.kernel.org, imx@...ts.linux.dev,
linux-riscv@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
linux-mtd@...ts.infradead.org, linux-aspeed@...ts.ozlabs.org,
openbmc@...ts.ozlabs.org, linux-stm32@...md-mailman.stormreply.com,
Pratyush Yadav <pratyush@...nel.org>,
Tudor Ambarus <tudor.ambarus@...aro.org>, stable+noautosel@...nel.org
Subject: [PATCH v2 00/27] spi-nand/spi-mem DTR support
Hello Mark, hello MTD folks,
Here is a (big) series supposed to bring DTR support in SPI-NAND.
I could have split this into two but I eventually preferred showing the
big picture. Once v1 will be over, I can make it two. However when we'll
discuss merging, we'll have to share an immutable tag among the two
subsystems.
Here is the logic:
* patches 1 & 2 add support for spi-mem operations with a specific
frequency limitation. This is not only related to DTR support, because
as you can see I could use this to support basic features in the
Winbond driver.
* patches 3-17 are going through all the easy controller drivers, where
effectively supporting these per-operation limitation was easy to
do. In practice, I believe all controllers can, but software is
sometimes the limiting factor. All controllers without spi-mem support
will gracefully handle the request (provided that they already care
about the maximum speed of course), and all the updated controllers in
this series will also handle the situation correctly. For the others,
it's an opt-in parameter, so they will simply refuse the operation
during the checks_op/supports_op() phase.
* patches 18-20 add DTR support in spi-mem.
* patches 21-24 add DTR support in SPI-NAND.
* patches 25-27 add DTR support to Winbon chips.
---
Changes in v2:
- Fixed breakage reported by Mark.
- Created an "adjust_op_freq" helper in the core and used it from
spi_mem_exec_op(). This way it is called only once. The main parameter
must still be casted otherwise we would need to do the call outside of
spi_mem_exec_op() which would imply about 40 different changes in the
core and drivers and also the assurance that we would get it wrong
again later.
- Reworked the logic for picking the best variant to include all
subtleties due to maximum/supported frequencies. The choice takes
slightly longer now but should return the truly fastest variant for
each case.
- Removed unique parenthesis in some kdoc comment.
- Fixed the inconsistency when handling the maximum per operation
frequencies between spi-mem and non spi-mem controllers.
- Fixed many typos.
- Added a core check to validate the per op frequency against the minimum
supported frequencies by controller drivers.
- Removed a useless check from the amd driver and turned a function
void. Also used the controller parameters in this driver rather than
the top-level definitions.
- Clarified some of the commit logs.
- Collected tags.
- Prevented a patch from being picked-up automatically by the stable
team.
- Reordered some terms in macros in the spi-mem core.
- Rebased on top of v6.13-rc1.
- Link to v1: https://lore.kernel.org/r/20241025161501.485684-1-miquel.raynal@bootlin.com
---
Miquel Raynal (27):
spi: spi-mem: Extend spi-mem operations with a per-operation maximum frequency
spi: spi-mem: Add a new controller capability
spi: amd: Support per spi-mem operation frequency switches
spi: amd: Drop redundant check
spi: amlogic-spifc-a1: Support per spi-mem operation frequency switches
spi: cadence-qspi: Support per spi-mem operation frequency switches
spi: dw: Support per spi-mem operation frequency switches
spi: fsl-qspi: Support per spi-mem operation frequency switches
spi: microchip-core-qspi: Support per spi-mem operation frequency switches
spi: mt65xx: Support per spi-mem operation frequency switches
spi: mxic: Support per spi-mem operation frequency switches
spi: nxp-fspi: Support per spi-mem operation frequency switches
spi: rockchip-sfc: Support per spi-mem operation frequency switches
spi: spi-sn-f-ospi: Support per spi-mem operation frequency switches
spi: spi-ti-qspi: Support per spi-mem operation frequency switches
spi: zynq-qspi: Support per spi-mem operation frequency switches
spi: zynqmp-gqspi: Support per spi-mem operation frequency switches
spi: spi-mem: Reorder spi-mem macro assignments
spi: spi-mem: Create macros for DTR operation
spi: spi-mem: Estimate the time taken by operations
mtd: spinand: Create distinct fast and slow read from cache variants
mtd: spinand: Add an optional frequency to read from cache macros
mtd: spinand: Enhance the logic when picking a variant
mtd: spinand: Add support for read DTR operations
mtd: spinand: winbond: Update the *JW chip definitions
mtd: spinand: winbond: Add comment about naming
mtd: spinand: winbond: Add support for DTR operations
drivers/mtd/nand/spi/alliancememory.c | 4 +--
drivers/mtd/nand/spi/ato.c | 4 +--
drivers/mtd/nand/spi/core.c | 15 ++++++--
drivers/mtd/nand/spi/esmt.c | 4 +--
drivers/mtd/nand/spi/foresee.c | 4 +--
drivers/mtd/nand/spi/gigadevice.c | 16 ++++-----
drivers/mtd/nand/spi/macronix.c | 4 +--
drivers/mtd/nand/spi/micron.c | 8 ++---
drivers/mtd/nand/spi/paragon.c | 4 +--
drivers/mtd/nand/spi/toshiba.c | 4 +--
drivers/mtd/nand/spi/winbond.c | 27 ++++++++++++---
drivers/mtd/nand/spi/xtx.c | 4 +--
drivers/spi/spi-amd.c | 21 ++++++------
drivers/spi/spi-amlogic-spifc-a1.c | 7 +++-
drivers/spi/spi-cadence-quadspi.c | 3 +-
drivers/spi/spi-dw-core.c | 10 ++++--
drivers/spi/spi-fsl-qspi.c | 12 +++++--
drivers/spi/spi-mem.c | 64 +++++++++++++++++++++++++++++++++++
drivers/spi/spi-microchip-core-qspi.c | 26 +++++++++++---
drivers/spi/spi-mt65xx.c | 7 +++-
drivers/spi/spi-mxic.c | 3 +-
drivers/spi/spi-nxp-fspi.c | 12 +++++--
drivers/spi/spi-rockchip-sfc.c | 11 ++++--
drivers/spi/spi-sn-f-ospi.c | 8 +++--
drivers/spi/spi-ti-qspi.c | 7 +++-
drivers/spi/spi-zynq-qspi.c | 13 +++++--
drivers/spi/spi-zynqmp-gqspi.c | 13 ++++---
include/linux/mtd/spinand.h | 58 ++++++++++++++++++++++++++++---
include/linux/spi/spi-mem.h | 56 +++++++++++++++++++++++++++++-
29 files changed, 349 insertions(+), 80 deletions(-)
---
base-commit: 9100187b36091e5cc046d1f415f50a04ec31c25f
change-id: 20241210-winbond-6-11-rc1-quad-support-0148205a21a2
Best regards,
--
Miquel Raynal <miquel.raynal@...tlin.com>
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