linux-kernel - [PATCH v2 11/27] spi: mxic: Support per spi-mem operation frequency switches

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Message-Id: <20241224-winbond-6-11-rc1-quad-support-v2-11-ad218dbc406f@bootlin.com>
Date: Tue, 24 Dec 2024 18:05:56 +0100
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Mark Brown <broonie@...nel.org>, Sanjay R Mehta <sanju.mehta@....com>, 
 Serge Semin <fancer.lancer@...il.com>, Han Xu <han.xu@....com>, 
 Conor Dooley <conor.dooley@...rochip.com>, 
 Daire McNamara <daire.mcnamara@...rochip.com>, 
 Matthias Brugger <matthias.bgg@...il.com>, 
 AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, 
 Haibo Chen <haibo.chen@....com>, Yogesh Gaur <yogeshgaur.83@...il.com>, 
 Heiko Stuebner <heiko@...ech.de>, Michal Simek <michal.simek@....com>, 
 Miquel Raynal <miquel.raynal@...tlin.com>, 
 Richard Weinberger <richard@....at>, Vignesh Raghavendra <vigneshr@...com>, 
 Jacky Huang <ychuang3@...oton.com>, Shan-Chun Hung <schung@...oton.com>, 
 Chin-Ting Kuo <chin-ting_kuo@...eedtech.com>, 
 Cédric Le Goater <clg@...d.org>, 
 Joel Stanley <joel@....id.au>, Andrew Jeffery <andrew@...econstruct.com.au>, 
 Avi Fishman <avifishman70@...il.com>, Tomer Maimon <tmaimon77@...il.com>, 
 Tali Perry <tali.perry1@...il.com>, Patrick Venture <venture@...gle.com>, 
 Nancy Yuen <yuenn@...gle.com>, Benjamin Fair <benjaminfair@...gle.com>, 
 Maxime Coquelin <mcoquelin.stm32@...il.com>, 
 Alexandre Torgue <alexandre.torgue@...s.st.com>, 
 Raju Rangoju <Raju.Rangoju@....com>
Cc: Thomas Petazzoni <thomas.petazzoni@...tlin.com>, 
 Steam Lin <stlin2@...bond.com>, linux-spi@...r.kernel.org, 
 linux-kernel@...r.kernel.org, imx@...ts.linux.dev, 
 linux-riscv@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org, 
 linux-mediatek@...ts.infradead.org, linux-rockchip@...ts.infradead.org, 
 linux-mtd@...ts.infradead.org, linux-aspeed@...ts.ozlabs.org, 
 openbmc@...ts.ozlabs.org, linux-stm32@...md-mailman.stormreply.com
Subject: [PATCH v2 11/27] spi: mxic: Support per spi-mem operation
 frequency switches

Every ->exec_op() call correctly configures the spi bus speed to the
maximum allowed frequency for the memory using the constant spi default
parameter. Since we can now have per-operation constraints, let's use
the value that comes from the spi-mem operation structure instead. In
case there is no specific limitation for this operation, the default spi
device value will be given anyway.

The per-operation frequency capability is thus advertised to the spi-mem
core.

Signed-off-by: Miquel Raynal <miquel.raynal@...tlin.com>
---
 drivers/spi/spi-mxic.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-mxic.c b/drivers/spi/spi-mxic.c
index 809767d3145c17291525ab7c246085597e0ff5e6..eeaea6a5e3103952e71a474e0de84099bc476a79 100644
--- a/drivers/spi/spi-mxic.c
+++ b/drivers/spi/spi-mxic.c
@@ -522,7 +522,7 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem,
 	int i, ret;
 	u8 addr[8], cmd[2];
 
-	ret = mxic_spi_set_freq(mxic, mem->spi->max_speed_hz);
+	ret = mxic_spi_set_freq(mxic, op->max_freq);
 	if (ret)
 		return ret;
 
@@ -582,6 +582,7 @@ static const struct spi_controller_mem_caps mxic_spi_mem_caps = {
 	.dtr = true,
 	.ecc = true,
 	.swap16 = true,
+	.per_op_freq = true,
 };
 
 static void mxic_spi_set_cs(struct spi_device *spi, bool lvl)

-- 
2.47.0