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Message-ID: <20241225090113.17027-3-bo.kong@mediatek.com>
Date: Wed, 25 Dec 2024 17:00:21 +0800
From: bo.kong <bo.kong@...iatek.com>
To: <mchehab@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>
CC: <conor+dt@...nel.org>, <matthias.bgg@...il.com>,
<angelogioacchino.delregno@...labora.com>, <Bo.Kong@...iatek.com>,
<linux-media@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: [PATCH v3 2/4] media: dt-bindings: add MT8188 AIE
From: Bo Kong <Bo.Kong@...iatek.com>
Add YAML device tree bindings for MT8188 AIE.
Signed-off-by: Bo Kong <Bo.Kong@...iatek.com>
---
Changes in v3:
none
Changes in v2:
1. Fix coding style
---
.../bindings/media/mediatek,mt8188-aie.yaml | 97 +++++++++++++++++++
1 file changed, 97 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8188-aie.yaml
diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8188-aie.yaml b/Documentation/devicetree/bindings/media/mediatek,mt8188-aie.yaml
new file mode 100644
index 000000000000..63dd720ef6ec
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek,mt8188-aie.yaml
@@ -0,0 +1,97 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/mediatek-aie.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: The AI Engine Unit of MediaTek Camera System
+
+maintainers:
+ - Bo Kong <bo.kong@...iatek.com>
+
+description:
+ AIE(AI Engine) is one of the units in mt8188 ISP which
+ provides hardware accelerated face detection function,
+ it can detect different sizes of faces in a raw image.
+
+properties:
+ compatible:
+ items:
+ - const: mediatek,mt8188-aie
+
+ reg:
+ maxItems: 1
+ description: Physical base address and length of the register space.
+
+ interrupts:
+ maxItems: 1
+
+ mediatek,larb:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Must contain the local arbiters in the current SoCs, see
+ Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml
+ for details.
+
+ iommus:
+ maxItems: 4
+ description:
+ Points to the respective IOMMU block with master port as argument, see
+ Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
+ Ports are according to the HW.
+
+ power-domains:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: clock for imgsys main ipe
+ - description: clock for ipe fdvt
+ - description: clock for ipe smi larb12
+ - description: clock for ipe top
+
+ clock-names:
+ items:
+ - const: img_ipe
+ - const: ipe_fdvt
+ - const: ipe_smi_larb12
+ - const: ipe_top
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - iommus
+ - power-domains
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/memory/mediatek,mt8188-memory-port.h>
+ #include <dt-bindings/power/mediatek,mt8188-power.h>
+ #include <dt-bindings/clock/mediatek,mt8188-clk.h>
+ aie@...10000 {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "mediatek,mt8188-aie";
+ reg = <0 0x15310000 0 0x1000>;
+ interrupts = <GIC_SPI 787 IRQ_TYPE_LEVEL_HIGH 0>;
+ mediatek,larb = <&larb12>;
+ iommus = <&vpp_iommu M4U_PORT_L12_FDVT_RDA_0>,
+ <&vpp_iommu M4U_PORT_L12_FDVT_RDB_0>,
+ <&vpp_iommu M4U_PORT_L12_FDVT_WRA_0>,
+ <&vpp_iommu M4U_PORT_L12_FDVT_WRB_0>;
+ power-domains = <&spm MT8188_POWER_DOMAIN_IPE>;
+ clocks = <&imgsys CLK_IMGSYS_MAIN_IPE>,
+ <&ipesys CLK_IPE_FDVT>,
+ <&ipesys CLK_IPE_SMI_LARB12>,
+ <&ipesys CLK_IPESYS_TOP>;
+ clock-names = "img_ipe",
+ "ipe_fdvt",
+ "ipe_smi_larb12",
+ "ipe_top";
+ };
--
2.45.2
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