linux-kernel - [PATCH v4 05/17] phy: phy-rockchip-samsung-hdptx: Supplement some register names with their full version

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Message-Id: <20241226063313.3267515-6-damon.ding@rock-chips.com>
Date: Thu, 26 Dec 2024 14:33:01 +0800
From: Damon Ding <damon.ding@...k-chips.com>
To: heiko@...ech.de
Cc: robh@...nel.org,
	krzk+dt@...nel.org,
	conor+dt@...nel.org,
	rfoss@...nel.org,
	vkoul@...nel.org,
	sebastian.reichel@...labora.com,
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	kever.yang@...k-chips.com,
	dri-devel@...ts.freedesktop.org,
	devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
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	Damon Ding <damon.ding@...k-chips.com>
Subject: [PATCH v4 05/17] phy: phy-rockchip-samsung-hdptx: Supplement some register names with their full version

Complete the register names of CMN_REG(0081) and CMN_REG(0087) to their
full version, and it can help to better match the datasheet.

Signed-off-by: Damon Ding <damon.ding@...k-chips.com>
---
 drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
index 0fecbb1df6fb..2f3c69c7ee31 100644
--- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
+++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
@@ -82,14 +82,14 @@
 #define ROPLL_SSC_EN			BIT(0)
 /* CMN_REG(0081) */
 #define OVRD_PLL_CD_CLK_EN		BIT(8)
-#define PLL_CD_HSCLK_EAST_EN		BIT(0)
+#define ANA_PLL_CD_HSCLK_EAST_EN	BIT(0)
 /* CMN_REG(0086) */
 #define PLL_PCG_POSTDIV_SEL_MASK	GENMASK(7, 4)
 #define PLL_PCG_CLK_SEL_MASK		GENMASK(3, 1)
 #define PLL_PCG_CLK_EN			BIT(0)
 /* CMN_REG(0087) */
-#define PLL_FRL_MODE_EN			BIT(3)
-#define PLL_TX_HS_CLK_EN		BIT(2)
+#define ANA_PLL_FRL_MODE_EN		BIT(3)
+#define ANA_PLL_TX_HS_CLK_EN		BIT(2)
 /* CMN_REG(0089) */
 #define LCPLL_ALONE_MODE		BIT(1)
 /* CMN_REG(0097) */
-- 
2.34.1