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Message-Id: <20241226-amlogic-pinctrl-v2-4-cdae42a67b76@amlogic.com>
Date: Thu, 26 Dec 2024 15:57:44 +0800
From: Xianwei Zhao via B4 Relay <devnull+xianwei.zhao.amlogic.com@...nel.org>
To: Linus Walleij <linus.walleij@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Neil Armstrong <neil.armstrong@...aro.org>,
Kevin Hilman <khilman@...libre.com>, Jerome Brunet <jbrunet@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Bartosz Golaszewski <brgl@...ev.pl>
Cc: linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-amlogic@...ts.infradead.org, Xianwei Zhao <xianwei.zhao@...ogic.com>
Subject: [PATCH v2 4/5] arm64: dts: amlogic: a4: add pinctrl node
From: Xianwei Zhao <xianwei.zhao@...ogic.com>
Add pinctrl device to support Amlogic A4 and add uart pinconf.
Signed-off-by: Xianwei Zhao <xianwei.zhao@...ogic.com>
---
arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 133 ++++++++++++++++++++++++++++
1 file changed, 133 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
index de10e7aebf21..90ef74b015bd 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi
@@ -5,6 +5,7 @@
#include "amlogic-a4-common.dtsi"
#include <dt-bindings/power/amlogic,a4-pwrc.h>
+#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
/ {
cpus {
#address-cells = <2>;
@@ -48,3 +49,135 @@ pwrc: power-controller {
};
};
};
+
+&apb {
+ periphs_pinctrl: pinctrl@...0 {
+ compatible = "amlogic,pinctrl-a4";
+ reg = <0x0 0x4000 0x0 0x0050>,
+ <0x0 0x40c0 0x0 0x0220>;
+ reg-names = "mux", "gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpiox: gpio@10 {
+ reg = <0x10>, <0x3>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <18>;
+ identity = <AMLOGIC_GPIO_X>;
+ };
+
+ gpiot: gpio@20 {
+ reg = <0x20>, <0xb>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <23>;
+ identity = <AMLOGIC_GPIO_T>;
+ };
+
+ gpiod: gpio@30 {
+ reg = <0x30>, <0x10>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <16>;
+ identity = <AMLOGIC_GPIO_D>;
+ };
+
+ gpioe: gpio@40 {
+ reg = <0x40>, <0x12>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <2>;
+ identity = <AMLOGIC_GPIO_E>;
+ };
+
+ gpiob: gpio@60 {
+ reg = <0x60>, <0x0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <14>;
+ identity = <AMLOGIC_GPIO_B>;
+ };
+
+ func-uart-a {
+ uart_a_default: uart-a-pins1 {
+ pinmux= <AML_PINMUX(AMLOGIC_GPIO_X, 11, AF1)>,
+ <AML_PINMUX(AMLOGIC_GPIO_X, 12, AF1)>,
+ <AML_PINMUX(AMLOGIC_GPIO_X, 13, AF1)>,
+ <AML_PINMUX(AMLOGIC_GPIO_X, 14, AF1)>;
+ };
+
+ uart-a-pins2 {
+ pinmux= <AML_PINMUX(AMLOGIC_GPIO_D, 2, AF3)>,
+ <AML_PINMUX(AMLOGIC_GPIO_D, 3, AF3)>;
+ bias-pull-up;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ func-uart-b {
+ uart_b_default: uart-b-pins {
+ pinmux= <AML_PINMUX(AMLOGIC_GPIO_E, 0, AF3)>,
+ <AML_PINMUX(AMLOGIC_GPIO_E, 1, AF3)>;
+ bias-pull-up;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ func-uart-d {
+ uart_d_default: uart-d-pins1 {
+ pinmux= <AML_PINMUX(AMLOGIC_GPIO_T, 18, AF4)>,
+ <AML_PINMUX(AMLOGIC_GPIO_T, 19, AF4)>;
+ bias-pull-up;
+ drive-strength-microamp = <4000>;
+ };
+
+ uart-d-pins2 {
+ pinmux= <AML_PINMUX(AMLOGIC_GPIO_T, 7, AF2)>,
+ <AML_PINMUX(AMLOGIC_GPIO_T, 8, AF2)>,
+ <AML_PINMUX(AMLOGIC_GPIO_T, 9, AF2)>,
+ <AML_PINMUX(AMLOGIC_GPIO_T, 10, AF2)>;
+ bias-pull-up;
+ drive-strength-microamp = <4000>;
+ };
+ };
+
+ func-uart-e {
+ uart_e_default: uart-e-pins {
+ pinmux= <AML_PINMUX(AMLOGIC_GPIO_T, 14, AF3)>,
+ <AML_PINMUX(AMLOGIC_GPIO_T, 15, AF3)>,
+ <AML_PINMUX(AMLOGIC_GPIO_T, 16, AF3)>,
+ <AML_PINMUX(AMLOGIC_GPIO_T, 17, AF3)>;
+ bias-pull-up;
+ drive-strength-microamp = <4000>;
+ };
+ };
+ };
+
+ aobus_pinctrl: pinctrl@...00 {
+ compatible = "amlogic,pinctrl-a4";
+ reg = <0x0 0x8e700 0x0 0x04>,
+ <0x0 0x8e704 0x0 0x60>;
+ reg-names = "mux", "gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpioao: gpio@0 {
+ reg = <0x0>, <0x0>;
+ mask = <0xfffffff>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <7>;
+ identity = <AMLOGIC_GPIO_AO>;
+ };
+
+ test_n: gpio@10 {
+ reg = <0x10>, <0x0>;
+ mask = <0xf0000000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <1>;
+ identity = <AMLOGIC_GPIO_TEST_N>;
+ };
+ };
+};
--
2.37.1
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