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Message-ID: <rldtbuqtfx32hwdeoqcohsn26chpnfczuxcu3mcrt7xy2thnwg@7qibugnhyjz5>
Date: Thu, 26 Dec 2024 12:39:59 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: Abel Vesa <abel.vesa@...aro.org>
Cc: Ulf Hansson <ulf.hansson@...aro.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Konrad Dybcio <konradybcio@...nel.org>, Johan Hovold <johan@...nel.org>, 
	Dmitry Baryshkov <dmitry.baryshkov@...aro.org>, linux-mmc@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org, 
	Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: Re: [PATCH v5 0/2] arm64: dts: qcom: x1e80100: Describe SDCs and
 enable support on QCP

On Thu, Dec 26, 2024 at 01:47:37PM +0200, Abel Vesa wrote:
> The X1E80100 has two SDHC controllers (called SDC2 and SDC4).
> Describe both of them and enable the SDC2 on QCP. This brings
> SD card support for the microSD port on QCP.
> 
> The SDC4 is described but there is no device outthere yet that makes
> use of it, AFAIK.
> 
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>

Seems we hit a race condition, I fixed up the icc tags while applying
v4, but I didn't adjust the status. Could you please double check what I
did pick up and send an incremental patch with the status update?

Thanks,
Bjorn

> ---
> Changes in v5:
> - Switched the interconnect paths tags to QCOM_ICC_TAG_ALWAYS and
>   QCOM_ICC_TAG_ACTIVE_ONLY, as Konrad suggested. 
> - Actually enabled the sdhc on QCP (status = "okay" was missing).
> - Rebased to fix conflicts due to smb2360 nodes which were already
>   merged.
> - Link to v4: https://lore.kernel.org/r/20241212-x1e80100-qcp-sdhc-v4-0-a74c48ee68a3@linaro.org
> 
> Changes in v4:
> - Squashed the pinconf for SDC2 into the patch that describes the
>   controllers.
> - Reworded the commit messages a bit.
> - Link to v3: https://lore.kernel.org/r/20241022-x1e80100-qcp-sdhc-v3-0-46c401e32cbf@linaro.org
> 
> Changes in v3:
> - Reordered the default and sleep pinconfs. Also the bias and
>   drive-strength properties. As per Konrad's suggestion.
> - Link to v2: https://lore.kernel.org/r/20241014-x1e80100-qcp-sdhc-v2-0-868e70a825e0@linaro.org
> 
> Changes in v2:
> - rebased on next-20241011
> - dropped the bindings schema update patch
> - dropped the sdhci-caps-mask properties from both
>   controllers as SDR104/SDR50 are actually supported
> - Link to v1: https://lore.kernel.org/r/20241008-x1e80100-qcp-sdhc-v1-0-dfef4c92ae31@linaro.org
> 
> ---
> Abel Vesa (2):
>       arm64: dts: qcom: x1e80100: Describe the SDHC controllers
>       arm64: dts: qcom: x1e80100-qcp: Enable SD card support
> 
>  arch/arm64/boot/dts/qcom/x1e80100-qcp.dts |  21 +++++
>  arch/arm64/boot/dts/qcom/x1e80100.dtsi    | 146 ++++++++++++++++++++++++++++++
>  2 files changed, 167 insertions(+)
> ---
> base-commit: 8155b4ef3466f0e289e8fcc9e6e62f3f4dceeac2
> change-id: 20241007-x1e80100-qcp-sdhc-15c716dad946
> 
> Best regards,
> -- 
> Abel Vesa <abel.vesa@...aro.org>
> 

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