linux-kernel - [PATCH v3 3/6] pinctrl: qcom: ipq5424: rename spi0 pins

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Message-ID: <20241227072446.2545148-4-quic_mmanikan@quicinc.com>
Date: Fri, 27 Dec 2024 12:54:43 +0530
From: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
To: <andersson@...nel.org>, <linus.walleij@...aro.org>, <robh@...nel.org>,
        <krzk+dt@...nel.org>, <conor+dt@...nel.org>, <konradybcio@...nel.org>,
        <mturquette@...libre.com>, <sboyd@...nel.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-gpio@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-clk@...r.kernel.org>
CC: <quic_varada@...cinc.com>, <quic_srichara@...cinc.com>
Subject: [PATCH v3 3/6] pinctrl: qcom: ipq5424: rename spi0 pins

SPI protocol runs on serial engine 4. Hence rename
spi0 pins to spi4 like spi0_cs to spi4_cs etc.

Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
---
 drivers/pinctrl/qcom/pinctrl-ipq5424.c | 32 +++++++++++++-------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/pinctrl/qcom/pinctrl-ipq5424.c b/drivers/pinctrl/qcom/pinctrl-ipq5424.c
index 0d610b076da3..05c45a115d7a 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq5424.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq5424.c
@@ -233,10 +233,10 @@ enum ipq5424_functions {
 	msm_mux_sdc_clk,
 	msm_mux_sdc_cmd,
 	msm_mux_sdc_data,
-	msm_mux_spi0_clk,
-	msm_mux_spi0_cs,
-	msm_mux_spi0_miso,
-	msm_mux_spi0_mosi,
+	msm_mux_spi4_clk,
+	msm_mux_spi4_cs,
+	msm_mux_spi4_miso,
+	msm_mux_spi4_mosi,
 	msm_mux_spi1,
 	msm_mux_spi10,
 	msm_mux_spi11,
@@ -300,7 +300,7 @@ static const char * const qspi_clk_groups[] = {
 	"gpio5",
 };
 
-static const char * const spi0_clk_groups[] = {
+static const char * const spi4_clk_groups[] = {
 	"gpio6",
 };
 
@@ -318,7 +318,7 @@ static const char * const qdss_tracedata_a_groups[] = {
 	"gpio38", "gpio39",
 };
 
-static const char * const spi0_cs_groups[] = {
+static const char * const spi4_cs_groups[] = {
 	"gpio7",
 };
 
@@ -326,7 +326,7 @@ static const char * const cri_trng1_groups[] = {
 	"gpio7",
 };
 
-static const char * const spi0_miso_groups[] = {
+static const char * const spi4_miso_groups[] = {
 	"gpio8",
 };
 
@@ -334,7 +334,7 @@ static const char * const cri_trng2_groups[] = {
 	"gpio8",
 };
 
-static const char * const spi0_mosi_groups[] = {
+static const char * const spi4_mosi_groups[] = {
 	"gpio9",
 };
 
@@ -695,10 +695,10 @@ static const struct pinfunction ipq5424_functions[] = {
 	MSM_PIN_FUNCTION(sdc_clk),
 	MSM_PIN_FUNCTION(sdc_cmd),
 	MSM_PIN_FUNCTION(sdc_data),
-	MSM_PIN_FUNCTION(spi0_clk),
-	MSM_PIN_FUNCTION(spi0_cs),
-	MSM_PIN_FUNCTION(spi0_miso),
-	MSM_PIN_FUNCTION(spi0_mosi),
+	MSM_PIN_FUNCTION(spi4_clk),
+	MSM_PIN_FUNCTION(spi4_cs),
+	MSM_PIN_FUNCTION(spi4_miso),
+	MSM_PIN_FUNCTION(spi4_mosi),
 	MSM_PIN_FUNCTION(spi1),
 	MSM_PIN_FUNCTION(spi10),
 	MSM_PIN_FUNCTION(spi11),
@@ -718,10 +718,10 @@ static const struct msm_pingroup ipq5424_groups[] = {
 	PINGROUP(3, sdc_data, qspi_data, pwm2, _, _, _, _, _, _),
 	PINGROUP(4, sdc_cmd, qspi_cs, _, _, _, _, _, _, _),
 	PINGROUP(5, sdc_clk, qspi_clk, _, _, _, _, _, _, _),
-	PINGROUP(6, spi0_clk, pwm1, _, cri_trng0, qdss_tracedata_a, _, _, _, _),
-	PINGROUP(7, spi0_cs, pwm1, _, cri_trng1, qdss_tracedata_a, _, _, _, _),
-	PINGROUP(8, spi0_miso, pwm1, wci_txd, wci_rxd, _, cri_trng2, qdss_tracedata_a, _, _),
-	PINGROUP(9, spi0_mosi, pwm1, _, cri_trng3, qdss_tracedata_a, _, _, _, _),
+	PINGROUP(6, spi4_clk, pwm1, _, cri_trng0, qdss_tracedata_a, _, _, _, _),
+	PINGROUP(7, spi4_cs, pwm1, _, cri_trng1, qdss_tracedata_a, _, _, _, _),
+	PINGROUP(8, spi4_miso, pwm1, wci_txd, wci_rxd, _, cri_trng2, qdss_tracedata_a, _, _),
+	PINGROUP(9, spi4_mosi, pwm1, _, cri_trng3, qdss_tracedata_a, _, _, _, _),
 	PINGROUP(10, uart0, pwm0, spi11, _, wci_txd, wci_rxd, _, qdss_tracedata_a, _),
 	PINGROUP(11, uart0, pwm0, spi1, _, wci_txd, wci_rxd, _, qdss_tracedata_a, _),
 	PINGROUP(12, uart0, pwm0, spi11, _, prng_rosc0, qdss_tracedata_a, _, _, _),
-- 
2.34.1