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Message-ID: <20241228150043.3926696-1-dario.binacchi@amarulasolutions.com>
Date: Sat, 28 Dec 2024 16:00:30 +0100
From: Dario Binacchi <dario.binacchi@...rulasolutions.com>
To: linux-kernel@...r.kernel.org
Cc: linux-amarula@...rulasolutions.com,
	Dario Binacchi <dario.binacchi@...rulasolutions.com>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	Conor Dooley <conor+dt@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Marc Kleine-Budde <mkl@...gutronix.de>,
	Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Rob Herring <robh@...nel.org>,
	Vincent Mailhol <mailhol.vincent@...adoo.fr>,
	devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-can@...r.kernel.org,
	linux-stm32@...md-mailman.stormreply.com
Subject: [PATCH] dt-bindings: can: st,stm32-bxcan: fix st,gcan property type

The SRAM memory shared pointed to by the st,gcan property is unique, so
we don't need an array of phandles.

Fixes: e43250c0ac81 ("dt-bindings: net: can: add STM32 bxcan DT bindings")
Signed-off-by: Dario Binacchi <dario.binacchi@...rulasolutions.com>

---

 Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml
index de1d4298893b..c7510b00954a 100644
--- a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml
+++ b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml
@@ -63,7 +63,7 @@ properties:
     maxItems: 1
 
   st,gcan:
-    $ref: /schemas/types.yaml#/definitions/phandle-array
+    $ref: /schemas/types.yaml#/definitions/phandle
     description:
       The phandle to the gcan node which allows to access the 512-bytes
       SRAM memory shared by the two bxCAN cells (CAN1 primary and CAN2
-- 
2.43.0


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