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Message-ID: <202412281555.YMBF9azh-lkp@intel.com>
Date: Sat, 28 Dec 2024 15:08:11 +0800
From: kernel test robot <lkp@...el.com>
To: Luca Ceresoli <luca@...aceresoli.net>
Cc: llvm@...ts.linux.dev, oe-kbuild-all@...ts.linux.dev,
linux-kernel@...r.kernel.org, Lee Jones <lee@...nel.org>,
Guenter Roeck <linux@...ck-us.net>
Subject: drivers/watchdog/max77620_wdt.c:43: warning: Excess struct member
'wdt_info' description in 'max77620_variant'
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: fd0584d220fe285dc45be43eede55df89ad6a3d9
commit: 254099d8fafcd80e11a3246f6ff62af816a2b566 watchdog: max77620: Add support for the max77714 variant
date: 2 years, 10 months ago
config: arm64-randconfig-003-20241220 (https://download.01.org/0day-ci/archive/20241228/202412281555.YMBF9azh-lkp@intel.com/config)
compiler: clang version 20.0.0git (https://github.com/llvm/llvm-project 9daf10ff8f29ba3a88a105aaa9d2379c21b77d35)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241228/202412281555.YMBF9azh-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202412281555.YMBF9azh-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> drivers/watchdog/max77620_wdt.c:43: warning: Excess struct member 'wdt_info' description in 'max77620_variant'
vim +43 drivers/watchdog/max77620_wdt.c
25
26 /**
27 * struct max77620_variant - Data specific to a chip variant
28 * @wdt_info: watchdog descriptor
29 * @reg_onoff_cnfg2: ONOFF_CNFG2 register offset
30 * @reg_cnfg_glbl2: CNFG_GLBL2 register offset
31 * @reg_cnfg_glbl3: CNFG_GLBL3 register offset
32 * @wdtc_mask: WDTC bit mask in CNFG_GLBL3 (=bits to update to ping the watchdog)
33 * @bit_wd_rst_wk: WD_RST_WK bit offset within ONOFF_CNFG2
34 * @cnfg_glbl2_cfg_bits: configuration bits to enable in CNFG_GLBL2 register
35 */
36 struct max77620_variant {
37 u8 reg_onoff_cnfg2;
38 u8 reg_cnfg_glbl2;
39 u8 reg_cnfg_glbl3;
40 u8 wdtc_mask;
41 u8 bit_wd_rst_wk;
42 u8 cnfg_glbl2_cfg_bits;
> 43 };
44
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