linux-kernel - Re: [PATCH 1/2] dt-bindings: gpio: add binding doc for siflower,sf19a2890-gpio

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Message-ID: <CAJsYDVJXLjd6ih4C5k+e-jAJ4DvKOPcJ3OwBQX+S=AmohzENmg@mail.gmail.com>
Date: Sun, 29 Dec 2024 11:06:16 +0800
From: Chuanhong Guo <gch981213@...il.com>
To: Linus Walleij <linus.walleij@...aro.org>
Cc: linux-gpio@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, Bartosz Golaszewski <brgl@...ev.pl>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Philipp Zabel <p.zabel@...gutronix.de>, Qingfang Deng <qingfang.deng@...lower.com.cn>
Subject: Re: [PATCH 1/2] dt-bindings: gpio: add binding doc for siflower,sf19a2890-gpio

Hello!

On Sat, Dec 28, 2024 at 12:45 AM Linus Walleij <linus.walleij@...aro.org> wrote:
>
> Hi Chuanhong,
>
> thanks for your patch!
>
> On Wed, Dec 25, 2024 at 4:59 AM Chuanhong Guo <gch981213@...il.com> wrote:
>
> > Add dt binding doc for the GPIO controller found on Siflower SF19A2890
> > and various other Siflower MIPS and RISC-V SoCs.
> >
> > Signed-off-by: Chuanhong Guo <gch981213@...il.com>
> (...)
> > +  interrupts:
> > +    description:
> > +      Interrupt mapping, one interrupt per 16 GPIOs.
>
> So from the driver it is very clear that this is lumping together several
> GPIO blocks with 16 GPIOs in each into a bigger GPIO controller, despite
> the instances are identical. They even each have an individual IRQ.
>
> > +  ngpios:
> > +    description:
> > +      The number of GPIOs available on the controller implementation.
> > +    minimum: 1
>
> I would say minimum: 1 maximum: 16 default: 16.
>
> One instance per block/bank.
>
> > +examples:
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/irq.h>
> > +    #include <dt-bindings/interrupt-controller/mips-gic.h>
> > +    gpio@...00000 {
> > +      compatible = "siflower,sf19a2890-gpio";
> > +      reg = <0x19d00000 0x100000>;
>
> Just use 4 instances. Since (looking at the driver) it seems there
> is an IRQ register that is "off the bulk" I would do something like:
>
> instance 0:
>
> reg = <0x19d00000 0x40>, <0x19d04000 4>;
>
> instance: 1:
>
> reg = <0x19d00040 0x40>, <0x19d04004 4>;
>
> (...etc...)

Actually, this weird GPIO controller uses one 0x40 block per pin (The
49 pin controller uses 0x40 * 49 or about 3K memory space just for IO
registers!), and they share a single reset signal from the reset
controller.
I don't know how one reset could be shared across multiple platform
devices so I don't think this kind of split is possible.

--
Regards,
Chuanhong Guo